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X76F200V8I Datasheet(PDF) 3 Page - Xicor Inc. |
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X76F200V8I Datasheet(HTML) 3 Page - Xicor Inc. |
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3 / 16 page  X76F200 3 Figure 1. X76F200 Device Operation Retry Counter The X76F200 contains a retry counter. The retry counter allows 8 accesses with an invalid password before any action is taken. The counter will increment with any combination of incorrect passwords. If the retry counter overflows, the memory area and both of the passwords are cleared to "0". If a correct password is received prior to retry counter overflow, the retry counter is reset and access is granted. Device Protocol The X76F200 supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter and the receiving device as a receiver. The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers and provide the clock for both transmit and receive operations. Therefore, the X76F200 will be considered a slave in all applications. Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA changes during SCL HIGH are reserved for indicating start and stop conditions. Refer to Figure 2 and Figure 3. Start Condition All commands are preceeded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH. The X76F200 continuously monitors the SDA and SCL lines for the start condition and will not respond to any command until this condition is met. A start may be issued to terminate the input of a control byte or the input data to be written. This will reset the device and leave it ready to begin a new read or write command. Because of the push/pull output, a start cannot be generated while the part is outputting data. Starts are inhibited while a write is in progress. Stop Condition All communications must be terminated by a stop condition. The stop condition is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to reset the device during a command or data input sequence and will leave the device in the standby power mode. As with starts, stops are inhibited when outputting data and while a write is in progress. Acknowledge Acknowledge is a software convention used to indicate successful data transfer. The transmitting device, either master or slave, will release the bus after transmitting eight bits. During the ninth clock cycle the receiver will pull the SDA line LOW to acknowledge that it received the eight bits of data. The X76F200 will respond with an acknowledge after recognition of a start condition and its slave address. If both the device and a write condition have been selected, the X76F200 will respond with an acknowledge after the receipt of each subsequent eight-bit word. LOAD COMMAND/ADDRESS BYTE LOAD 8-BYTE PASSWORD VERIFY PASSWORD ACCEPTANCE BY USE OF ACK POLLING READ/WRITE DATA BYTES |
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