Voltage Sample and Infinite Hold

6

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Detailed Description

The DS4303 provides a precise, NV output voltage,

of embedded systems. The DS4303 output voltage can

be adjusted over almost the entire operating supply

range of the device, and it can be precisely set to with-

in ±1mV. A graphical description of the DS4303 is pro-

vided in the block diagram.

During factory calibration, a simple adjustment proce-

dure must be followed. This entire procedure includes

and waiting for the completion of the EEPROM storage

cycle (See the timing diagram in Figure 1). At the start

voltage needs to be completely stable before the

adjustment procedure begins, and it must remain sta-

ble throughout the entire adjustment procedure. The

DS4303 will start its self-adjust procedure when the

after which it can be released at any time. Once ADJ

has been released, it should not be toggled again for

the remainder of the adjustment procedure. After the

adjust period can be determined using the formula

ADJ

GND

ADC

AND

CONTROL

EEPROM

12-BIT

DAC

DS4303

Figure 1. Timing Diagram

PIN

NAME

FUNCTION

1

ADJ

Adjust Control Input

2

GND

Ground

Sample Voltage Input

4

Voltage Output

Power-Supply Voltage

Pin Description

Block Diagram

ADJ

FIRST PROGRAMMING CYCLE

ADDITIONAL PROGRAMMING CYCLES (IF REQUIRED)