Voltage Sample and Infinite Hold

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Printed USA

is a registered trademark of Maxim Integrated Products, Inc.

is a registered trademark of Dallas Semiconductor Corporation.

Layout Considerations

To prevent an inadvertent programming cycle from

occurring during power-up, minimize capacitive load-

ing on the ADJ pin. A large capacitance on this pin

could potentially hold ADJ in a low state long enough

that a programming cycle is initiated.

Power-Supply Decoupling

To achieve best results, it is highly recommended that

a decoupling capacitor is used on the IC power-supply

pin. Typical values of decoupling capacitors are 0.01µF

or 0.1µF. Use a high-quality, ceramic, surface-mount

and GND pins of the IC to minimize lead inductance.

Chip Topology

TRANSISTOR COUNT: 6001

SUBSTRATE CONNECTED TO GROUND

Package Information

For the latest package outline information, go to

www.maxim-ic.com/DallasPackInfo.