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AD9804JST Datasheet(PDF) 4 Page - Analog Devices |
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AD9804JST Datasheet(HTML) 4 Page - Analog Devices |
4 / 8 page REV. 0 AD9804 –4– Pin No. Mnemonic Type Description 1, 2, 18, 24, 31 NC NC Internally Not Connected 34, 36, 45 3–12 D0–D9 DO Digital Data Outputs 13 DRVDD P Digital Output Driver Supply 14 DRVSS P Digital Output Driver Ground 15, 41, 42, 44 DVSS P Digital Ground 16 DATACLK DI Digital Data Output Latch Clock 17, 40 DVDD P Digital Supply 19 PBLK DI Preblanking Clock Input 20 CLPOB DI Black Level Clamp Clock Input 21 SHP DI CDS Sampling Clock for CCD’s Reference Level 22 SHD DI CDS Sampling Clock for CCD’s Data Level 23 CLPDM DI Input Clamp Clock Input 25, 26, 35 AVSS P Analog Ground 27, 33 AVDD P Analog Supply 28 BYP1 AO Internal Bias Level Decoupling 29 BYP2 AO Internal Bias Level Decoupling 30 CCDIN AI Analog Input for CCD Signal 32 BYP4 AO Internal Bias Level Decoupling 37 CML AO Internal Bias Level Decoupling 38 VRT AO A/D Converter Top Reference Voltage Decoupling 39 VRB AO A/D Converter Bottom Reference Voltage Decoupling 43 RSTB DI Chip Reset Control. Active Low 46 SL DI Serial Digital Interface Load Pulse. 47 SDATA DI Serial Digital Interface Data 48 SCK DI Serial Digital Interface Clock TYPE: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power. PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 48 47 46 45 44 39 38 43 42 41 40 37 PIN 1 IDENTIFIER TOP VIEW (Not to Scale) 36 35 34 33 32 31 30 29 28 27 26 25 NC AVSS NC AVDD BYP4 NC CCDIN NC NC (LSB) D0 D1 D2 D3 D4 NC = NO CONNECT D5 D6 D7 D8 BYP2 BYP1 AVDD AVSS AD9804 (MSB) D9 AVSS |
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