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STV6436S Datasheet(PDF) 7 Page - STMicroelectronics |
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STV6436S Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 17 page 7/17 STV6436 Electrical Characteristics 2.3.1 Video Section (Y1, Y2 and CVBS Signals) Test conditions: TAMB = 25°C, VCC =5 V; VCCB =5V; RGENERATOR =75 Ω, RLOUT =75 Ω for Y1 and CVBS outputs and RLOUT =150 Ω for Y2 output, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit VDCIN DC Input Level, Bottom Clamp input Bottom level, Y1 and CVBS inputs 2 V ICLAMP Clamping Current, Bottom Clamp input at VDCIN - 400 mV 12 mA ILEAK Input Leakage Current, Bottom Clamp input VIN = VDCIN +1 V 110 µA VDCIN_YSYNC DC Input Level Y2 input, YCrCb mode, Black Level 2.3 V CIN Input Capacitance 2 pF VIN Maximum Input Signal VCCV = 5 V 1.5 VPP DYN Dynamic Output Signal VCCV = 5 V 3 VPP Y1F1 -1 dB Bandwidth (Flatness) of Y1 and CVBS 1H signal 4.0 4.5 MHz Y2F1 -1 dB Bandwidth (Flatness) of Y2 1H signal 4.0 4.5 MHz Y1F3 -3 dB Bandwidth of Y1 and CVBS 1H signal 7 MHz Y2F3 -3 dB Bandwidth of Y2 1H signal 7 MHz Y1SBR Stopband Rejection 27 MHz versus 100 kHz - 40 dB Y2SBR Stopband Rejection 27 MHz versus 100 kHz - 40 dB Flatness Spread of Gain in Video Bands VIN = 1 VPP Band = 15 kHz to 5 MHz for Y1, Y2 and CVBS ±0.5 dB VCTo Crosstalk Isolation of Y1 (or Y2 or CVBS) from C and Cr Cb channels VIN = 0.5 VPP at f = 3.58 MHz, on either CIN_ENC or CRIN_ENC or CBIN_ENC input, RLOAD = 150 Ω 55 dB ROUT Output Resistance 5 10 Ω GY Gain on Y1, Y2 and CVBS channels VIN = 1 VPP at f = 1 MHz 5.566.5 dB DCYOUT DC Output Voltage (Y1 and Y2) Video signal bottom sync pulse at IC output pins 0.5 V DCCVBSOUT DC Output Voltage (CVBS) Video signal bottom sync pulse at IC output pin 1.0 V DPHI Differential Phase VIN = 1 VPP at f = 3.58 MHz 0.2 3 deg. DG Differential Gain VIN = 1 VPP at f = 3.58 MHz 0.3 3 % LNL Luminance non-linearity 0.5 3 % VSN7 Video S/N Ratio: Y1, C and CVBS channels (7 MHz filter) NTC-7 weighting 4.2 MHz Lowpass 70 dB Dtpd7 Group Delay Variation from Flatness 7 MHz filter 20 nS |
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