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SY89825UHI Datasheet(PDF) 2 Page - Micrel Semiconductor |
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SY89825UHI Datasheet(HTML) 2 Page - Micrel Semiconductor |
2 / 8 page 2 ClockWorks™ SY89825U Micrel LOGIC SYMBOL CLK_SEL LVDS_CLK /LVDS_CLK LVPECL_CLK /LVPECL_CLK OE 0 1 22 22 Q0 - Q21 /Q0 - /Q21 LEN D Q Pin Function LVDS_CLK, Differential LVDS Inputs /LVDS_CLK (Internal 100 Ω termination included) LVPECL_CLK, Differential LVPECL Inputs. /LVPECL_CLK CLK_SEL Input CLK Select (LVTTL) OE Output Enable (LVTTL) Q0 – Q21, /Q0 – /Q21 Differential LVPECL Outputs. Terminate with 50 Ω to V CC-2V GND Ground VCCI Power Supply. Connect to VCC on PCB. VCCI and VCCO are not internally connected VCCO Power Supply for Output Buffer. Connect to VCCI on PCB. VCCI and VCCO are not internally connected PIN NAMES OE(1) CLK_SEL Q0 – Q21 /Q0 – /Q21 0 0 LOW HIGH 0 1 LOW HIGH 1 0 LVDS_CLK /LVDS_CLK 1 1 LVPECL_CLK /LVPECL_CLK TRUTH TABLE NOTE: 1. The OE (output enable) signal is synchronized with the low level of the LVDS_CLK and LVPECL_CLK signal. Signal I/O Level LVDS_CLK, /LVDS_CLK Input LVDS Q0 – Q21, /Q0 – /Q21 Output LVPECL LVPECL_CLK, /LVPECL_CLK Input LVPECL CLK_SEL, OE Input LVCMOS/LVTTL SIGNAL GROUPS ABSOLUTE MAXIMUM RATINGS(1) NOTE: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data book. Exposure to ABSOLUTE MAXIMUM RATING conditions for extended periods may affect device reliability. Symbol Rating Value Unit VCCI /VCCO VCC Pin Potential to Ground Pin –0.5 to +4.0 V VIN Input Voltage –0.5 to VCCI V IOUT DC Output Current –50 mA Tstore Storage Temperature –65 to +150 °C θ JA Package Thermal Resistance (Junction-to-Ambient) With exposed pad soldered to GND – Still-Air (multi-layer PCB) 23 °C/W – 200lfpm (multi-layer PCB) 18 °C/W – 500lfpm (multi-layer PCB) 15 °C/W Exposed pad not soldered to GND – Still-Air (multi-layer PCB) 44 °C/W – 200lfpm (multi-layer PCB) 36 °C/W – 500lfpm (multi-layer PCB) 30 °C/W θ JC Package Thermal Resistance 4.3 °C/W (Junction-to-Case) |
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