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HT82J97E-28SOP-A Datasheet(PDF) 5 Page - Holtek Semiconductor Inc |
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HT82J97E-28SOP-A Datasheet(HTML) 5 Page - Holtek Semiconductor Inc |
5 / 46 page HT82J97E Rev. 1.30 5 May 10, 2004 Program Memory - ROM The program memory is used to store the program in- structions which are to be executed. It also contains data, table, and interrupt entries, and is organized into 2048 ´14 bits, addressed by the program counter and ta- ble pointer. Certain locations in the program memory are reserved for special usage: · Location 000H This area is reserved for program initialization. After a chip reset, the program always begins execution at lo- cation 000H. · Location 004H This area is reserved for the USB interrupt service program. If the USB interrupt is activated, the interrupt is enabled and the stack is not full, the program begins execution at location 004H. · Location 00CH This location is reserved for the Timer/Event Counter interrupt service program. If a timer interrupt results from a Timer/Event Counter overflow, and the inter- rupt is enabled and the stack is not full, the program begins execution at location 00CH. · Table location Any location in the program memory can be used as look-up tables. There are three method to read the ROM data by two table read instructions: ²TABRDC² and ²TABRDL², transfer the contents of the lower-order byte to the specified data memory, and the higher-order byte to TBLH (08H). The three methods are shown as follows: ¨ The instructions ²TABRDC [m]² (the current page, one page=256words), where the table locations is defined by TBLP (07H) in the current page. And the ROM code option TBHP is disabled (default). ¨ The instructions ²TABRDC [m]², where the table lo- cations is defined by registers TBLP (07H) and TBHP (01FH). And the ROM code option TBHP is enabled. ¨ The instructions ²TABRDL [m]², where the table lo- cations is defined by Registers TBLP (07H) in the last page (0700H~07FFH). Only the destination of the lower-order byte in the ta- ble is well-defined, the other bits of the table word are transferred to the lower portion of TBLH, and the re- maining 1-bit words are read as ²0². The Table Higher-order byte register (TBLH) is read only. The ta- ble pointer (TBLP, TBHP) is a read/write register (07H, 1FH), which indicates the table location. Before ac- cessing the table, the location must be placed in the TBLP and TBHP (If the OTP option TBHP is disabled, the value in TBHP has no effect). The TBLH is read only and cannot be restored. If the main routine and the ISR (Interrupt Service Routine) both employ the table read instruction, the contents of the TBLH in the main routine are likely to be changed by the table read instruction used in the ISR. Errors can occur. In other words, using the table read instruction in the main rou- tine and the ISR simultaneously should be avoided. However, if the table read instruction has to be applied in both the main routine and the ISR, the interrupt should be disabled prior to the table read instruction. It will not be enabled until the TBLH has been backed up. All table related instructions require two cycles to complete the operation. These areas may function as normal program memory depending on the require- ments. Once TBHP is enabled, the instruction ²TABRDC [m]² reads the ROM data as defined by TBLP and TBHP value. Otherwise, the ROM code option TBHP is dis- abled, the instruction ²TABRDC [m]² reads the ROM data as defined by TBLP and the current program counter bits. 1 4 B i t s 7 F F H n F F H P r o g r a m M e m o r y L o o k - u p T a b l e ( 2 5 6 W o r d s ) L o o k - u p T a b l e ( 2 5 6 W o r d s ) N o t e : n r a n g e s f r o m 0 t o 7 0 0 C H n 0 0 H D e v i c e I n i t i a l i z a t i o n P r o g r a m U S B I n t e r r u p t S u b r o u t i n e 0 0 4 H 0 0 0 H T i m e r / E v e n t C o u n t e r I n t e r r u p t S u b r o u t i n e Program Memory Instruction Table Location *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table Location Note: *10~*0: Table location bits P10~P8: Current program counter bits when TBHP is disabled @7~@0: TBLP bits TBHP register bit2~bit0 when TBHP is enabled |
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