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NTE7135 Datasheet(PDF) 2 Page - NTE Electronics |
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NTE7135 Datasheet(HTML) 2 Page - NTE Electronics |
2 / 4 page Electrical Characteristics: (VP1 = VP2 = 25V, VN = V6 = 0V, TA = +25°C, voltages referenced to substrate (Pin6) unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Supply Voltage 1 (Pin1) VP1 9 25 30 V Supply Voltage 2 (Pin4) VP2 9 25 60 V Supply Voltage 3 (Pin8) VP3 9 – 60 V Supply Current (Pin1) IP1 – – 10 mA Quiescent Supply Current (Pin4) IP2 Without Input Signal – 9 – mA Pre–Amplifier Input Voltage (Pin2 and Pin3) V2, V3 1.6 – VP1–0.5 V Input Quiescent Current I2, I3 Without Input Signal – 100 – nA Flyback Generator Output Voltage V7 Upper Value, I7 = –1A – VP3–2.2 – V Flyback Output Current (Maximum Value, Pin7) I7 (M) – – ±1 A Threshold Voltage to Switch Flyback V1–5 ON/OFF Threshold – 1.4 – V Flyback Pulse Time tp FLB – 250 – µs Vertical Output Output Voltage V5 Upper Value, I5 = –1A VP3–2.3 VP2–2 – V Lower Value, I5 = 1A – 1.5 1.7 V Vertical Output Current (Maximum Value, Pin5) I5 (M) – – ±1 A Non–Linearity of Output Signal LIN – – 1 % Pulse Circuit Output Output Voltage V9 RPCO = 10kΩ 0.4 – VP1–0.4 V Output Voltage for Thermal Protection Active V9 VP1–0.4 – – V Voltage to Insert Flyback Pulse on Pin9 V1–5 Normal Condition – – 1.4 V Pulse Width tp9 Deflection Open–Circuit – 50 – % Normal Condition tp FLB – – µs Functional Description: Differential Input Amplifier The differential sawtooth input signal (coming from a ramp output of the NTE7132 for example) is fed to the input pins 2 and 3. The non–inverted signal is attached to Pin3. The vertical feedback signal is superimposed on the inverted input signal on Pin2. Vertical shift is applied at the inputs in a power–less way. Flyback Generator Signals for the flyback generator and the pulse circuit are generated in the flyback driver stage. The flyback output consists of a Darlington transistor and a flyback diode. The flyback generator can oper- ate in two modes: 1. An external supply voltage is applied for the short flyback time, thus power dissipation is minimum. 2. The flyback voltage is generated by doubling the supply voltage. The 100 µF capacitor C2 between Pin4 and Pin7 is charged up to VP1 during scan, using the external diode and the resistor R2. The cathode of the capacitor C2 is connected to the positive rail during flyback. Thus, the flyback volt- age is twice the supply voltage. |
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