7

ATA6405 [Preliminary]

4737B–AUTO–08/04

Detailed Description of the

Watchdog Function

Figure 2. Watchdog Sequence

WD sequence (typically): t

t

After completion of the reset function (low/high slope on NRES) a lead time t

(e.g. for setups) of typically 40 µs before the actual watchdog sequence begins. Times t

1

and t

another. A triggering signal from the microcontroller is anticipated within the timeframe

of t

mum dwell time t

sequence. Should the triggering signal fail to emerge, the NRES output will be drawn on

ground potential applying the time duration t

likewise unleashed if the triggering signal emerges within the timeframe of t

alternatively if t

An example of how the above time values are defined is given in the first variant. How-

ever, the time values can, on principle, be selected by the mask function. A 6-bit counter

is available for t

the trigger pulse (low- or high-active) is selectable by the mask function.

The original time basis is defaulted by the internal oscillator. The time basis T

watchdog is obtained by applying a division ratio of 1:4. All the times indicated above

are multiples of T

Oscillator cycle duration:

T

Time basis for watchdog:

T

The above time values and oscillator tolerances result in a typical triggering frequency

based on T = 10.56 ms ±0.94 ms.

NRES

NTRIG

t

d

t

1

t

2

t

1

t

2

t

res

t

d

t

trig