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MX98745 Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers

Part # MX98745
Description  100 BASE-TX/FX REPEATER CONTROLLER
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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MX98745 Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers

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MX98745
P/N:PM0427
REV. 1.4, JUL. 8, 1998
5.0 PIN DESCRIPTION
A. MX Data Transceiver (Am78965/Am78966 or MC68836), 98 pins
PAD #
Name
I/O
Description
24-28
TDAT[7:1][0:4]
O,
Transmit Data. These five outputs are 5B encoded transmit data sym
9-13
TTL
bols, driven at the rising edge of LSCLK.
155-159
TDAT4 is the Most Significant Bit.
142-146
128-132
113-117
98-102
30
LSCLK
I,
Local Synchrnous Clock. This pin supplies the frequency reference to
TTL
the MX98745 within same HUB. It should be driven by a crystal-
controlled 25M clock source.
18-22
RDAT[7:1][0:4]
I,
Receive Data. These 5 bit parallel data symbol from transceiver are
4-8
TTL
latched by the rising edge of RSCLK of each port.
150-154
RDAT4 is the Most Significant Bit.
137-141
122-126
107-111
92-96
15,2
RSCLK[7:0]
I,
Recovered Symbol Clock. This is a 25 MHz clock, which is derived
148,134
TTL
from the clock synchronization PLL circuit.
118,104
90,42
16,3,
SIGDET[7:1]
I,
Signal Detect. This signal indicates that the received signal is above
149,135,
TTL
the detection threshold and will be used for the link test state machine.
119,105,
91
31
Monitor
I,
Monitor Mode. Internal Pulldown. When this pin is set to one, LED
TTL
display pins LED[9:0] will be changed to monitor mode.
Table 5-1 Pin Description for XRCII


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