6

Integrated Circuit Solution Inc.

DR026-0A 09/04/2001

IC41C44002A/IC41C44002AS(L)

IC41LV44002A/IC41LV44002AS(L)

(Recommended Operating Conditions unless otherwise noted.)

Symbol Parameter

Test Condition

Speed Min.

Max.

Unit

Input Leakage Current

Any input 0V

−55

µA

Other inputs not under test = 0V

Output Leakage Current

Output is disabled (Hi-Z)

−55

µA

0V

Output High Voltage Level

2.4

−

V

Output Low Voltage Level

−

0.4

V

Standby Current: TTL

5V

−

2mA

3.3V

−

2

Standby Current: CMOS

− 0.2V

5V

−

1mA

3.3V

−

0.5

Operating Current:

RAS, CAS,

-50

−

120

mA

-60

−

110

Average Power Supply Current

Operating Current:

-50

−

90

mA

-60

−

80

Average Power Supply Current

Refresh Current:

RAS, CAS Cycling

-50

−

120

mA

-60

−

110

Average Power Supply Current

Self Refresh Mode

5V,nromal version

500

µA

5V, L version

350

3.3V, normal version

450

3.3, L version

350

Notes:

1. An initial pause of 200 µs is required after power-up followed by eight

RAS refresh cycles (RAS-Only or CBR) before proper device

operation is assured. The eight

2. Dependent on cycle rates.

3. Specified values are obtained with minimum cycle time and the output open.

4. Column-address is changed once each EDO page cycle.

5. Enables on-chip refresh and address counters.