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TMS320C6727GDH300 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C6727GDH300 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 115 page www.ti.com 1.2.1 Device Compatibility TMS320C6727, TMS320C6726, TMS320C6722 Floating-Point Digital Signal Processors SPRS268C – MAY 2005 – REVISED NOVEMBER 2005 Real-Time Interrupt Timer (RTI). The real-time interrupt timer module includes: • Two 32-bit counter/prescaler pairs • Two input captures (tied to McASP direct memory access [DMA] events for sample rate measurement) • Four compares with automatic update capability • Digital Watchdog (optional) for enhanced system robustness Clock Generation (PLL and OSC). The C672x DSP includes an on-chip oscillator that supports crystals in the range of 12 MHz to 25 MHz. Alternatively, the clock can be provided externally through the CLKIN pin. The DSP includes a flexible, software-programmable phase-locked loop (PLL) clock generator. Three different clock domains (SYSCLK1, SYSCLK2, and SYSCLK3) are generated by dividing down the PLL output. SYSCLK1 is the clock used by the CPU, memory controller, and memories. SYSCLK2 is used by the peripheral subsystem and dMAX. SYSCLK3 is used exclusively for the EMIF. The TMS320C672x floating-point digital signal processors are based on the new C67x+ CPU. This core is code-compatible with the C67x CPU core used on the TMS320C671x DSP family, but with significant enhancements including additional floating-point instructions. See Section 2.2 TMS320C6727, TMS320C6726, TMS320C6722 DSPs 4 |
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