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GS6333UR24D1 Datasheet(PDF) 1 Page - Vishay Siliconix |
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GS6333UR24D1 Datasheet(HTML) 1 Page - Vishay Siliconix |
1 / 6 page GS6332 and GS6333 Vishay formerly General Semiconductor Document Number 74810 www.vishay.com 22-May-02 1 3 Pin, Low-Power, µP Reset Circuits Description • The GS6333 and GS6332 are system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required. • When the processor power supply voltage drops below the reset threshold, the reset output is driven active, in less than 40 µs (TD1). Reset is maintained active for a time period (TD2), after the Vcc rises above the threshold voltage. • To prevent jitter, the reset threshold voltage has a built-in hysteresis of 0.4% of VTH. • The GS6333 has an active-low reset output, while the GS6332 has an active-high reset output. Both devices have push/pull output drives. • The reset signal is guaranteed valid, down to Vcc = 1.0V. • Low supply current of 3 µA makes these devices well suit- ed for battery powered applications. They are designed to reject fast transients from causing false resets. • Both devices are available in a space-saving SOT-23 package. Features • Tight reset voltage tolerances ± 1.8% • Low supply current: < 3 µA • Precision monitoring of 1.8V and 2.5V powersupply voltages • Other threshold voltage options available from 1.5V to 2.5V in approximately 100mV increments • Three reset active time-out period options: typical 1.5mS, 30mS, 150mS • Reset output guaranteed down to 1.0V • Vcc transient immunity • No external components Fig. 1 – Typical Application Diagram Pin Configuration SOT-23 (Top View) Applications • Computers • Critical µP/µC power monitoring • Battery powered equipment • Automotive electronics 1 2 3 GND Reset/ Reset Vcc VCC VCC RESET RESET INPUT GND VCC GND µP (RESET) GS6332 GS6333 |
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