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AT45DB081B-CC-2.5 Datasheet(PDF) 8 Page - ATMEL Corporation |
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AT45DB081B-CC-2.5 Datasheet(HTML) 8 Page - ATMEL Corporation |
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8 / 32 page  8 AT45DB081B 2225C–12/01 If a sector is programmed or reprogrammed sequentially page-by-page, then the pro- gramming algorithm shown in Figure 1 on page 26 is recommended. Otherwise, if multiple bytes in a page or several pages are programmed randomly in a sector, then the programming algorithm shown in Figure 2 on page 27 is recommended. Operation Mode Summary The modes described can be separated into two groups – modes which make use of the Flash memory array (Group A) and modes which do not make use of the Flash memory array (Group B). Group A modes consist of: 1. Main Memory Page Read 2. Main Memory Page to Buffer 1 (or 2) Transfer 3. Main Memory Page to Buffer 1 (or 2) Compare 4. Buffer 1 (or 2) to Main Memory Page Program with Built-in Erase 5. Buffer 1 (or 2) to Main Memory Page Program without Built-in Erase 6. Page Erase 7. Block Erase 8. Main Memory Page Program through Buffer 9. Auto Page Rewrite Group B modes consist of: 1. Buffer 1 (or 2) Read 2. Buffer 1 (or 2) Write 3. Status Register Read If a Group A mode is in progress (not fully completed) then another mode in Group A should not be started. However, during this time in which a Group A mode is in progress, modes in Group B can be started. This gives the Serial DataFlash the ability to virtually accommodate a continuous data stream. While data is being programmed into main memory from buffer 1, data can be loaded into buffer 2 (or vice versa). See application note AN-4 (“Using Atmel’s Serial DataFlash”) for more details. Pin Descriptions SERIAL INPUT (SI): The SI pin is an input-only pin and is used to shift data into the device. The SI pin is used for all data input including opcodes and address sequences. SERIAL OUTPUT (SO): The SO pin is an output-only pin and is used to shift data out from the device. SERIAL CLOCK (SCK): The SCK pin is an input-only pin and is used to control the flow of data to and from the DataFlash. Data is always clocked into the device on the rising edge of SCK and clocked out of the device on the falling edge of SCK. CHIP SELECT (CS): The DataFlash is selected when the CS pin is low. When the device is not selected, data will not be accepted on the SI pin, and the SO pin will remain in a high-impedance state. A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition on the CS pin is required to end an operation. |
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