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M470L1624FU0-CA2 Datasheet(PDF) 11 Page - Samsung semiconductor |
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M470L1624FU0-CA2 Datasheet(HTML) 11 Page - Samsung semiconductor |
11 / 20 page DDR SDRAM 128MB, 256MB SODIMM Pb-Free Revision 1.2 Oct. 2004 AC Operating Conditions Parameter/Condition Symbol Min Max Unit Note Input High (Logic 1) Voltage, DQ, DQS and DM signals VIH(AC) VREF + 0.31 V 3 Input Low (Logic 0) Voltage, DQ, DQS and DM signals. VIL(AC) VREF - 0.31 V 3 Input Differential Voltage, CK and CK inputs VID(AC) 0.7 VDDQ+0.6 V 1 Input Crossing Point Voltage, CK and CK inputs VIX(AC) 0.5*VDDQ-0.2 0.5*VDDQ+0.2 V 2 Note 1. VID is the magnitude of the difference between the input level on CK and the input on CK. 2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same. 3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in simula- tion. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz. Output Load Circuit (SSTL_2) Output Z0=50 Ω CLOAD=30pF VREF =0.5*VDDQ RT=50 Ω Vtt=0.5*VDDQ Input/Output Capacitance (VDD=2.5V, VDDQ=2.5V, TA= 25 °C, f=1MHz) Parameter Symbol M470L1624FU0 M470L3224FU0 M485L1624FU0 Unit Min Max Min Max Min Max Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE ) CIN1 41 454957 4145 pF Input capacitance(CKE0, CKE1) CIN2 34 38 42 50 34 38 pF Input capacitance( CS0, CS1) CIN3 34 384250 3438 pF Input capacitance( CLK0, CLK1,CLK2) CIN4 25 30 25 30 25 30 pF Input capacitance(DM0~DM7,DM8(for ECC)) CIN5 6 7 6 7 6 7 pF Data & DQS input/output capacitance(DQ0~DQ63) Cout1 6 7 6 7 6 7 pF Data input/output capacitance (CB0~CB7) Cout2 - - - - 6 7 pF |
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