IS61LV12824

6

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. D

06/22/05

-8

-10

Symbol

Parameter

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

8

—

10

—

ns

Address Access Time

—

8

—

10

ns

Output Hold Time

3

—

3

—

ns

CE1, CE2 Access Time

8

—

—

10

ns

CE2 Access Time

OE Access Time

—

4

—

4

ns

OE to High-Z Output

0

3

0

3

ns

OE to Low-Z Output

0

—

0

—

ns

CE1, CE2 to High-Z Output

0

4

0

5

ns

CE2 to High-Z Output

CE, CE2 to Low-Z Output

3

—

3

—

ns

CE2 to Low-Z Output

Notes:

1. Test conditions assume signal transition times of 2 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and

output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.