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K9F1216D0A-P Datasheet(PDF) 8 Page - Samsung semiconductor

Part # K9F1216D0A-P
Description  64M x 8 Bit , 32M x 16 Bit NAND Flash Memory
Download  46 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K9F1216D0A-P Datasheet(HTML) 8 Page - Samsung semiconductor

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FLASH MEMORY
8
K9F1208D0A
K9F1208U0A
K9F1216D0A
K9F1216U0A
256Word
8 Word
Figure 2-2. K9F1216X0A (X16) ARRAY ORGANIZATION
NOTE : Column Address : Starting Address of the Register.
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
I/O8 to 15
1st Cycle
A0
A1
A2
A3
A4
A5
A6
A7
L*
2nd Cycle
A9
A10
A11
A12
A13
A14
A15
A16
L*
3rd Cycle
A17
A18
A19
A20
A21
A22
A23
A24
L*
4th Cycle
A25
L*
L*
L*
L*
L*
L*
L*
L*
Page Register
(=256 Words)
128K Pages
(=4,096 Blocks)
256 Word
16 bit
8 Word
1 Block =32 Pages
= (8K + 256) Word
I/O 0 ~ I/O 15
1 Page = 264 Word
1 Block = 264 Word x 32 Pages
= (8K + 256) Word
1 Device = 264Words x 32Pages x 4096 Blocks
= 528 Mbits
Column Address
Row Address
(Page Address)
Page Register
Figure 1-2. K9F1216X0A (X16) FUNCTIONAL BLOCK DIAGRAM
VCC
X-Buffers
5126M + 16M Bit
Command
NAND Flash
ARRAY
(256 + 8)Word x 131072
Y-Gating
Page Register & S/A
I/O Buffers & Latches
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Register
Control Logic
& High Voltage
Generator
Global Buffers
Output
Driver
VSS
A9 - A25
A0 - A7
Command
CE
RE
WE
WP
I/0 0
I/0 15
VCC/VCCQ
VSS
CLE ALE


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