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W78E54B Datasheet(PDF) 10 Page - Winbond |
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W78E54B Datasheet(HTML) 10 Page - Winbond |
10 / 21 page W78E54B - 10 - OPERATIONS P3.0 (A9 CTRL) P3.1 (A13 CTRL) P3.2 (A14 CTRL) P3.3 (OE CTRL) P3.6 ( CE ) P3.7 ( OE ) EA (VPP) P2, P1 (A15..A0) P0 (D7..D0) NOTE Read 0 0 0 0 0 0 1 Address Data Out Output Disable 0 0 0 0 0 1 1 X Hi-Z Program 0 0 0 0 0 1 VCP Address Data In Program Verify 0 0 0 0 1 0 VCP Address Data Out @3 Erase 1 0 0 0 0 1 VEP A0:0, others: X Data In 0FFH @4 Erase Verify 1 0 0 0 1 0 VEP Address Data Out @5 Program/Erase Inhibit X 0 0 0 1 1 VCP/ VEP X X Notes: 1. All these operations happen in RST = VIH, ALE = VIL and PSEN = VIH. 2. VCP = 12.5V, VEP = 14.5V, VIH = VDD, VIL = Vss. 3. The program verify operation follows behind the program operation. 4. This erase operation will erase all the on-chip Flash EPROM cells and the Security bits. 5. The erase verify operation follows behind the erase operation. SECURITY BITS During the on-chip Flash EPROM operation mode, the Flash EPROM can be programmed and verified repeatedly. Until the code inside the Flash EPROM is confirmed OK, the code can be protected. The protection of Flash EPROM and those operations on it are described below. The W78E54B has a Security Register which can not be accessed in normal mode. These registers can only be accessed from the Flash EPROM operation mode. Those bits of the Security Register can not be changed once they have been programmed from high to low. They can only be reset through erase-all operation. The Security Register is addressed in the Flash EPROM operation mode by address #0FFFFh. |
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