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XRT82D20 Datasheet(PDF) 3 Page - Exar Corporation

Part # XRT82D20
Description  SINGLE CHANNEL E1 LINE INTERFACE UNIT
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT82D20 Datasheet(HTML) 3 Page - Exar Corporation

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XRT82D20
SINGLE CHANNEL E1 LINE INTERFACE UNIT
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REV. 1.0.7
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TABLE OF CONTENTS
GENERAL DESCRIPTION ................................................................................................. 1
FEATURES ................................................................................................................................................ 1
APPLICATIONS ......................................................................................................................................... 1
Figure 1. Block Diagram of the XRT82D20 .................................................................................................. 1
Figure 2. Pinout of the XRT82D20 ................................................................................................................ 2
ORDERING INFORMATION .............................................................................................................................. 2
PIN DESCRIPTIONS .......................................................................................................... 3
Figure 3. Interface Timing Diagram in Both Single-Rail and Dual-Rail Mode, with DIGI (Pin 17) = “0” . 5
Figure 4. Interface Timing Diagram in Dual-Rail Mode only, with DIGI (Pin 17) = “1” ............................. 6
ELECTRICAL CHARACTERISTICS .................................................................................. 7
TABLE 1: RECEIVER CHARACTERISTICS .............................................................................................................. 7
TABLE 2: TRANSMITTER CHARACTERISTICS ........................................................................................................ 7
TABLE 3: 3.3V POWER CONSUMPTION INCLUDING LINE POWER DISSIPATION, TRANSMISSION AND RECEIVE PATHS
ALL
ACTIVE ........................................................................................................................................................ 7
TABLE 4: 5V POWER CONSUMPTION INCLUDING LINE POWER DISSIPATION, TRANSMISSION AND RECEIVE PATHS ALL
ACTIVE ............................................................................................................................................................... 8
TABLE 5: AC ELECTRICAL CHARACTERISTICS ................................................................................................... 8
TABLE 6: DC ELECTRICAL CHARACTERISTICS .................................................................................................... 9
ABSOLUTE MAXIMUM RATINGS .......................................................................................................... 9
Figure 5. Receiver Maximum Jitter Tolerance, Test Conditions: Test Pattern 215-1, (-6dB) Cable Loss ..
10
Figure 6. Receiver Jitter Transfer Function (Jitter Attenuator Disabled), Test Conditions: Test Pattern
215-1, Input Jitter 0.5UIp-p ............................................................................................................................ 11
Figure 7. Receiver Jitter Transfer Function (Jitter Attenuator enabled) Test Conditions: Test Pattern 215-
1, Input Jitter 75% of Maximum Jitter Tolerance ........................................................................................ 11
SYSTEM DESCRIPTION .................................................................................................. 12
1.0 THE Receive Section ........................................................................................................................ 12
1.1 JITTER ATTENUATOR .................................................................................................................................. 12
1.2 THE TRANSMIT SECTION ............................................................................................................................ 12
Figure 8. Illustration on how the XRT82D20 Samples the data on the TPOS and TNEG input pins .... 12
1.3 THE PULSE SHAPING CIRCUIT ........................................................................................................................... 12
Figure 9. Illustration of the ITU-T G.703 Pulse Template for E1 Application .......................................... 13
1.4 INTERFACING THE TRANSMIT SECTION OF THE XRT82D20 TO THE LINE ............................................................. 14
Figure 10. Illustration of how to interface the XRT82D20 to the Line for 75
Ω Applications and 3.3V op-
eration only .................................................................................................................................................... 14
Figure 11. Illustration of how to interface the XRT82D20 to the Line for 120
Ω Applications and 3.3V op-
eration only .................................................................................................................................................... 15
1.5 INTERFACING THE RECEIVE SECTION TO THE LINE ............................................................................................. 15
Figure 12. Recommended Schematic for Transformer-Coupling the XRT82D20 to the Line for 75
Ω Ap-
plications and 5 V operation only ................................................................................................................ 16
Figure 13. Recommended Schematic for Transformer-Coupling the XRT82D20 to the Line for 120
Ω Ap-
plications and 5 V operation only ................................................................................................................ 17
1.6 CAPACITIVELY-COUPLING THE RECEIVE SECTION(S) OF THE XRT82D20 TO THE LINE ......................................... 18
Figure 14. Capacitively-coupling the Receive Section for 75
Ω Application and 3.3V supply ............. 18
Figure 15. Capacitively-coupling the Receive Section for 120
Ω Application and 3.3V supply ........... 19
Figure 16. Capacitively-coupling the Receive Section for 75
Ω Application and 5V supply ................ 20
Figure 17. Capacitively-coupling the Receive Section for 120
Ω Application and 5V supply .............. 21
2.0 Diagnostic Features ......................................................................................................................... 22
2.1 THE LOCAL LOOP-BACK MODE ......................................................................................................................... 22
Figure 18. Illustration of the Analog Local Loop-Back within the XRT82D20 ........................................ 22
2.2 THE REMOTE LOOP BACK MODE ....................................................................................................................... 23
Figure 19. Illustration of the Remote Loop-Back path, within the XRT82D20 ........................................ 23


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