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FMS6501 Datasheet(PDF) 8 Page - Fairchild Semiconductor |
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FMS6501 Datasheet(HTML) 8 Page - Fairchild Semiconductor |
8 / 16 page 8 www.fairchildsemi.com FMS6501 Rev. 1A Figure 4: Acknowledgement on the I2C Bus Acknowledge The number of data bytes transferred between the start and stop conditions from transmitter to receiver is unlim- ited. Each byte of eight bits is followed by an acknowl- edge bit. The acknowledge bit is a HIGH level signal put on the bus by the transmitter during which time the mas- ter generates an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges must pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowl- edge related clock pulse (set-up and hold times must be taken into consideration). A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to generate a stop condition. SCL FROM MASTER DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER START condition 12 89 clock pulse for acknowledgement I2C Bus Protocol Before any data is transmitted on the I2C bus, the device which should respond is addressed first. The addressing is always carried out with the first byte transmitted after the start procedure. The I2C bus configuration for a data write to the FMS6501 is shown below in figure 5: Figure 5: Write a register address to the pointer register, then write data to the selected register A6 A5 A4 A3 A2 A1 A0 19 R/W D7 D6 D5 D4 D3 D2 D1 D0 07 1 9 ACK. BY FMS6501 ACK. BY FMS6501 FRAME1 SERIAL BUS ADDRESS BYTE FRAME 2 ADDRESS POINTER REGISTER BYTE 19 D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY FMS6501 FRAME 3 DATA BYTE SCL SDA START BY MASTER STOP BY MASTER SCL(CONTINUED) SDA(CONTINUED) |
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