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LTC4267IGN Datasheet(PDF) 9 Page - Linear Technology |
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LTC4267IGN Datasheet(HTML) 9 Page - Linear Technology |
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9 / 32 page  LTC4267 9 4267f 4267 BD VPORTN BOLD LINE INDICATES HIGH CURRENT PATH POUT – + PGND RCLASS PWRGD CONTROL CIRCUITS INPUT CURRENT LIMIT POWER GOOD CLASSIFICATION CURRENT LOAD 1.237V EN 375mA 140mA 9k 16k – + EN 25k SIGNATURE RESISTOR VPORTP SIGDISA – + SLOPE COMP CURRENT RAMP PVCC GATE DRIVER NGATE SENSE 200kHz OSCILLATOR UNDERVOLTAGE LOCKOUT Q R CURRENT COMPARATOR SHUTDOWN COMPARATOR SHUTDOWN S 20mV ITH/RUN ERROR AMPLIFIER VFB SOFT- START CLAMP VCC SHUNT REGULATOR SWITCHING LOGIC AND BLANKING CIRCUIT 0.28V PVCC < VTURNON 0.3µA PVCC – + 1.2V 800mV REFERENCE OVERVIEW The LTC4267 is partitioned into two major blocks: a Powered Device (PD) interface controller and a current mode flyback switching regulator. The Powered Device (PD) interface is intended for use as the front end of a PD adhering to the IEEE 802.3af standard, and includes a trimmed 25kΩ signature resistor, classification current source, and an input current limit circuit. With these functions integrated into the LTC4267, the signature and power interface for a PD can be built that meets all the requirements of the IEEE 802.3af specification with a minimum of external components. The switching regulator portion of the LTC4267 is a con- stant frequency current mode controller that is optimized for Power over Ethernet applications. The regulator is designed to drive a 6V N-channel MOSFET and features soft-start and programmable slope compensation. The integrated error amplifier and precision reference give the PD designer the option of using a nonisolated topology without the need for an external amplifier or reference. The LTC4267 has been specifically designed to interface with both IEEE compliant Power Sourcing Equipment (PSE) and legacy PSEs which do not meet the inrush current requirement of the IEEE 802.3af specification. By setting the initial inrush current limit to a low level, a PD using the LTC4267 minimizes the current drawn from the PSE during start-up. After powering up, the LTC4267 switches to the high level current limit, thereby allowing the PD to consume up to 12.95W if an IEEE 802.3af PSE is present. This low level current limit also allows the LTC4267 to charge arbitrarily large load capacitors without exceeding the inrush limits of the IEEE 802.3af specification. This dual level current limit provides the system designer with flexibility to design PDs which are compatible with legacy PSEs while also being able to take advantage of the higher power available in an IEEE 802.3af system. Using an LTC4267 for the power and signature interface functions of a PD provides several advantages. The LTC4267 current limit circuit includes an onboard 100V, 400mA power MOSFET. This low leakage MOSFET is APPLICATIO S I FOR ATIO BLOCK DIAGRA |
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