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CY62157DV30L-55BVXI Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY62157DV30L-55BVXI
Description  8-Mbit (512K x 16) MoBL Static RAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY62157DV30L-55BVXI Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY62157DV30
MoBL®
Document #: 38-05392 Rev. *E
Page 4 of 12
Capacitance[11, 12]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = VCC(typ)
10
pF
COUT
Output Capacitance
10
pF
Thermal Resistance[11]
Parameter
Description
Test Conditions
BGA
TSOP II
TSOP I
Unit
ΘJA
Thermal Resistance
(Junction to Ambient)
Still Air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
72
75.13
74.88
°C/W
ΘJC
Thermal Resistance
(Junction to Case)
8.86
8.95
8.6
°C/W
AC Test Loads and Waveforms[13]
Parameters
2.50V
3.0V
Unit
R1
16667
1103
R2
15385
1554
RTH
8000
645
VTH
1.20
1.75
V
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
Conditions
Min.
Typ.[2] Max.
Unit
VDR
VCC for Data Retention
1.5
V
ICCDR
Data Retention Current
VCC= 1.5V
CE1 > VCC – 0.2V, CE2 < 0.2V,
VIN > VCC – 0.2V or VIN < 0.2V
Industrial (L)
10
µA
Industrial (LL)
4
Automotive (L)
25
tCDR[11]
Chip Deselect to Data
Retention Time
0ns
tR[14]
Operation Recovery Time
tRC
ns
Notes:
11. Tested initially and after any design or process changes that may affect these parameters.
12. The input capacitance on the CE2 pin of the FBGA and 48TSOPI packages and on the BHE pin of the 44TSOPII package is 15 pF.
13. Test condition for the 45 ns part is a load capacitance of 30 pF.
14. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 100 us or stable at VCC(min.) > 100 us.
VCC
VCC
OUTPUT
R2
30 pF / 50 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
Rise Time = 1 V/ns
Fall Time = 1 V/ns
OUTPUT
V
Equivalent to: THEVENIN EQUIVALENT
ALL INPUT PULSES
RTH
R1


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