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SSM4226GM Datasheet(PDF) 4 Page - Silicon Storage Technology, Inc |
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SSM4226GM Datasheet(HTML) 4 Page - Silicon Storage Technology, Inc |
4 / 4 page Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. www.SiliconStandard.com 4 of 4 SSM4226M/GM 8/06/2004 Rev.1.02 Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 10 100 1000 10000 1 5 9 13 17 21 25 29 V DS , Drain-to-Source Voltage (V) f=1.0MHz Ciss Coss Crss 0 4 8 12 16 0 1020304050 Q G , Total Gate Charge (nC) V DS =15V V DS =20V V DS =24V I D =8A 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Pulse Width (s) PDM Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 135℃ ℃ ℃ ℃/W t T 0.02 0.01 0.05 0.1 0.2 Duty factor=0.5 Single Pulse 0.01 0.1 1 10 100 0.1 1 10 100 V DS (V) T c =25 o C Single Pulse 1s 1ms 10ms 100ms DC 100us Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance td(on) tr td(off) tf VDS VGS 10% 90% Q VG 4.5V QGS QGD QG Charge Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform |
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