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M29W008ET90N6F Datasheet(PDF) 11 Page - STMicroelectronics

Part # M29W008ET90N6F
Description  8 Mbit (1Mb x 8, Boot Block) 3V Supply Flash Memory
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M29W008ET90N6F Datasheet(HTML) 11 Page - STMicroelectronics

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M29W008ET, M29W008EB
2 Signal descriptions
11/43
2.6
Ready/Busy Output (RB)
The Ready/Busy pin is an open-drain output that can be used to identify when the memory
array can be read. Ready/Busy is high impedance during Read mode, Auto Select mode and
Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high impedance. See
Table 13: Reset/Block Temporary Unprotect AC Characteristics
and
Figure 13: Reset/Block Temporary Unprotect AC Waveforms.
During Program or Erase operations Ready/Busy is Low, VOL. Ready/Busy will remain Low
during Read/Reset commands or Hardware Resets until the memory is ready to enter Read
mode.
2.7
Reset/Block Temporary Unprotect Input (RP)
The Reset/Block Temporary Unprotect input, RP, can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all blocks that have been previously protected.
A Hardware Reset is achieved by holding RP Low, VIL for at least tPLPX. After Reset/Block
Temporary Unprotect goes High, VIH, if the device is in Read or Standby mode, it will be ready
for new operations tPHEL after the rising edge of RP. If the device is in Erase, Erase Suspend or
Program mode, the Hardware Reset will last tPLYH during which the RB signal will be held at
VIL. The end of the memory Hardware Reset will be indicated by the rising edge of RB. A
Hardware Reset during an Erase or Program operation will corrupt the data being programmed
or the blocks being erased. See
Table 13: Reset/Block Temporary Unprotect AC
Characteristics and Figure 13: Reset/Block Temporary Unprotect AC Waveforms.
Holding RP at VID will temporarily unprotect the previously protected blocks in the memory.
Program and Erase operations on all blocks will be possible. The transition of RP from VIH to
VID must slower than tPHPHH.
When RP is returned from VID to VIH all blocks temporarily unprotected will be again protected.
2.8
VCC Supply Voltage
The power supply for all operations (Read, Program and Erase).
A 0.1µF capacitor should be connected between the VCC Supply Voltage pin and the VSS
Ground pin to decouple the current surges from the power supply. The PCB track widths must
be sufficient to carry the currents required during program and erase operations, ICC3
2.9
VSS Ground
VSS is the reference for all voltage measurements.


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