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M45PE10-VMP6G Datasheet(PDF) 9 Page - STMicroelectronics |
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M45PE10-VMP6G Datasheet(HTML) 9 Page - STMicroelectronics |
9 / 34 page 9/34 M45PE10 MEMORY ORGANIZATION The memory is organized as: ■ 512 pages (256 bytes each). ■ 131,072 bytes (8 bits each) ■ 2 sectors (512 Kbits, 65536 bytes each) Each page can be individually: – programmed (bits are programmed from 1 to 0) – erased (bits are erased from 0 to 1) – written (bits are changed to either 0 or 1) The device is Page or Sector Erasable (bits are erased from 0 to 1). Table 3. Memory Organization Figure 6. Block Diagram Sector Address Range 1 10000h 1FFFFh 0 00000h 0FFFFh AI07405 S W Control Logic High Voltage Generator I/O Shift Register Address Register and Counter 256 Byte Data Buffer 256 Bytes (Page Size) X Decoder C D Q Status Register 00000h 1FFFFh 000FFh Reset 10000h First 256 Pages can be made read-only |
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