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MCP6044 Datasheet(PDF) 11 Page - Microchip Technology |
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MCP6044 Datasheet(HTML) 11 Page - Microchip Technology |
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11 / 32 page  2002 Microchip Technology Inc. DS21669B-page 11 MCP6041/2/3/4 3.0 APPLICATIONS INFORMATION The MCP6041/2/3/4 family of operational amplifiers are fabricated on Microchip’s state-of-the-art CMOS process. They are unity gain stable and suitable for a wide range of applications requiring very low power consumption. With these op amps, the power supply pin needs to be by-passed with a 0.1 µF capacitor. 3.1 Rail to Rail Input The input stage of the family of devices uses two differ- ential input stages in parallel; one operates at low VCM (common mode input voltage) and the other at high VCM. With this topology, the MCP6041/2/3/4 family operates with VCM up to 300 mV past either supply rail. The Input Offset Voltage is measured at both VCM =VSS - 0.3 V and VDD + 0.3 V to ensure proper operation. 3.2 Output Loads and Battery Life The MCP6041/2/3/4 op amp family has outstanding quiescent current, which supports battery-powered applications. There is minimal quiescent current glitch- ing when chip select (CS) is raised or lowered. This prevents excessive current draw and reduced battery life, when the part is turned off or on. Heavy resistive loads at the output can cause exces- sive battery drain. Driving a DC voltage of 2.5 V across a 100 k Ω load resistor will cause the supply current to increase by 25 µA, depleting the battery 43 times as fast as IQ (0.6 µA typ) alone. High frequency signals (fast edge rate) across capaci- tive loads will also significantly increase supply current. For instance, a 0.1 µF capacitor at the output presents an AC impedance of 15.9 k Ω (1/2πfC) to a 100 Hz sinewave. It can be shown that the average power drawn from the battery by a 5.0 Vp-p sinewave (1.77 Vrms), under these conditions, is: EQUATION This will drain the battery 18 times as fast as IQ alone. 3.3 Rail to Rail Output The output voltage range of the MCP6041/2/3/4 family is specified two ways. The first specification, Maximum Output Voltage Swing, defines the maximum swing possible under a particular output load. According to the spec table, the output can reach ≤ 10 mV of either supply rail when RL = 50 kΩ. See Figure 2-32 for infor- mation on Maximum Output Voltage Swing vs. load resistance. The second specification, Linear Region Output Volt- age Swing, details the output voltage range that sup- ports the specified Open Loop Gain (AOL ≥ 95 dB with RL = 50 kΩ). 3.4 Input Voltage and Phase Reversal The MCP6041/2/3/4 op amp family uses CMOS tran- sistors at the input. It is designed to not exhibit phase inversion when the input pins exceed the supply volt- ages. Figure 2-39 shows an input voltage exceeding both supplies with no resulting phase inversion. The maximum operating VCM (common mode input voltage) that can be applied to the inputs is VSS -0.3 V and VDD +0.3 V. Voltage on the input that exceed this absolute maximum rating can cause excessive current to flow in or out of the input pins. Current beyond ±2 mA can cause possible reliability problems. Applications that exceed this rating must be externally limited with an input resistor as shown in Figure 3-1. FIGURE 3-1: An input resistor, RIN, should be used to limit excessive input current if the inputs exceed the Absolute Maximum specification. 3.5 Capacitive Load and Stability Driving capacitive loads can cause stability problems with voltage feedback op amps. A buffer configuration (G = +1) is the most sensitive to capacitive loads. Figure 2-27 shows how increasing the load capaci- tance will decrease the phase margin. While a phase margin above 60° is ideal, 45° is sufficient. As can be seen, up to CL = 150 pF can be placed on the MCP6041/2/3/4 op amp outputs without any problems, while 250 pF is usable with a 45° phase margin. When the op amp is required to drive large capacitive loads (CL >150 pF), a small series resistor (RISO in Figure 3-2) at the output of the amplifier improves the phase margin. This resistor makes the output load resistive at higher frequencies, which improves the phase margin. The bandwidth reduction caused by the capacitive load, however, is not changed. To select RISO, start with 1 kΩ, then use the MCP6041 SPICE PSUPPLY VDD VSS – () IQ VLp p – () + fCL () = 3.0 µW50µW + = 5V () 0.6µA5.0Vpp – + 100Hz 0.1 µF • • () = RIN VSS Minimum expected VIN () – 2 mA ---------------------------------------------------------------------------- ≥ RIN Maximum expected VIN () VDD – 2 mA ------------------------------------------------------------------------------- ≥ VIN RIN VOUT MCP604X |
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