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HT48RA3 Datasheet(PDF) 3 Page - Holtek Semiconductor Inc |
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HT48RA3 Datasheet(HTML) 3 Page - Holtek Semiconductor Inc |
3 / 36 page Absolute Maximum Ratings Supply Voltage ...........................VSS -0.3V to VSS+5.5V Storage Temperature ............................ -50°Cto125°C Input Voltage..............................VSS -0.3V to VDD+0.3V Operating Temperature........................... -40°Cto85°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil- ity. D.C. Characteristics Ta=25 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions VDD Operating Voltage ¾¾ 2.2 ¾ 3.6 V IDD Operating Current 3V No load, fSYS=4MHz ¾ 35 mA ISTB1 Standby Current (WDT Enabled) 3V No load, system HALT ¾ 510 mA ISTB2 Standby Current (WDT Disabled) 3V No load, system HALT ¾ 0.1 1 mA VIL1 Input Low Voltage for I/O Ports ¾¾ 0 ¾ 0.3VDD V VIH1 Input High Voltage for I/O Ports ¾¾ 0.7VDD ¾ VDD V VIL2 Input Low Voltage (RES Ports) ¾¾ 0 ¾ 0.4VDD V VIH2 Input High Voltage (RES Ports) ¾¾ 0.9VDD ¾ VDD V IOL I/O Port Sink Current 3V VOL=0.1VDD 510 ¾ mA IOH1 I/O Port Source Current 3V VOH=0.9VDD -2 -5 ¾ mA IOH2 I/O Port Source Current 3V VOH=0.8VDD -4 -8 ¾ mA RPH Pull-high Resistance 3V ¾ 40 60 80 k W A.C. Characteristics Ta=25 °C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions fSYS System Clock 3V ¾ 400 ¾ 4000 kHz fTIMER Timer I/P Frequency (TMR0/TMR1) 3V 50% duty 0 ¾ 4000 kHz tWDTOSC Watchdog Oscillator 3V ¾ 45 90 180 ms tWDT1 Watchdog Time-out Period (WDT OSC) 3V Without WDT prescaler 11.5 23 46 ms tWDT2 Watchdog Time-out Period (fSYS/4) 3V Without WDT prescaler ¾ 1024 ¾ tSYS tRES External Reset Low Pulse Width ¾¾ 1 ¾¾ ms tSST System Start-up Timer Period ¾ Power-up, reset or wake-up from HALT ¾ 1024 ¾ tSYS tINT Interrupt Pulse Width ¾¾ 1 ¾¾ ms tACC Data ROM Access Time ¾¾ 1 ¾¾ ms Note: tSYS=1/(fSYS) HT48RA3 Rev. 1.20 3 May 12, 2003 |
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