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IDT723633L15PF Datasheet(PDF) 3 Page - Jinan Gude Electronic Device |
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IDT723633L15PF Datasheet(HTML) 3 Page - Jinan Gude Electronic Device |
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3 / 28 page  3 COMMERCIALTEMPERATURERANGE IDT723623/723633/723643 BUS-MATCHING SyncFIFO™ 256 x 36, 512 x 36, 1,024 x 36 is useful since it permits flushing of the FIFO memory without changing any configurationsettings. These devices have two modes of operation: In the IDT Standard mode, the first word written to an empty FIFO is deposited into the memory array. A read operation is required to access that word (along with all other words residinginmemory).IntheFirstWordFallThroughmode(FWFT),thefirstword written to an empty FIFO appears automatically on the outputs, no read operation required (Nevertheless, accessing subsequent words does neces- sitate a formal read request). The state of the BE/ FWFT pin during Reset determines the mode in use. The FIFO has a combined Empty/Output Ready Flag ( EF/OR ) and a combinedFull/InputReadyFlag( FF/IR). TheEFandFFfunctionsareselected in the IDT Standard mode. EF indicates whether or not the FIFO memory is empty. FF shows whether the memory is full or not. The IR and OR functions are selected in the First Word Fall Through mode. IR indicates whether or not theFIFOhasavailablememorylocations.ORshowswhethertheFIFOhasdata available for reading or not. It marks the presence of valid data on the outputs. The FIFO has a programmable Almost-Empty flag ( AE)andaprogram- mable Almost-Full flag ( AF). AE indicates when a selected number of words remainin theFIFOmemoryachieveapredetermined"almost-emptystate". AF indicates when the FIFO contains more than a selected number of words. FF/IRandAFaretwo-stagesynchronizedtotheportclockthatwritesdata into its array. EF/ORandAEaretwo-stagesynchronizedtotheportclockthat reads data from its array. Programmable offsets for AEand AF areloaded in parallelusingPortAorinserialviatheSDinput.TheSerialProgrammingMode pin( SPM)makesthisselection.Threedefaultoffsetsettingsarealsoprovided. The AEthresholdcanbesetat8,16or64locationsfromtheemptyboundary and the AFthresholdcanbesetat8,16or64locationsfromthefullboundary. All these choices are made using the FS0 and FS1 inputs during Reset. Two or more devices may be used in parallel to create wider data paths. In First Word Fall Through mode, more than one device may be connected in series to create greater word depths. The addition of external components is unnecessary. If, at any time, the FIFO is not actively performing a function, the chip will automatically power down. During the power down state, supply current consumption(ICC)isataminimum. Initiatinganyoperation(byactivatingcontrol inputs) will immediately take the device out of the Power Down state. The IDT723623/723633/723643 are characterized for operation from 0 °C to 70 °C.Industrialtemperaturerange(-40°C to+85°C)isavailablebyspecial order. They are fabricated using IDT’s high speed, submicron CMOS technology. |
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