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MAX6893ETI Datasheet(PDF) 8 Page - Maxim Integrated Products

Part # MAX6893ETI
Description  Pin-Selectable, Octal/Hex/Quad, Power-Supply Sequencers/Supervisors
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX6893ETI Datasheet(HTML) 8 Page - Maxim Integrated Products

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Pin-Selectable, Octal/Hex/Quad, Power-Supply
Sequencers/Supervisors
8
_______________________________________________________________________________________
Pin Description (continued)
PIN
MAX6892
MAX6893
MAX6894
NAME
FUNCTION
14
12
12
TH1
Threshold Selection Input 1. Logic input to select desired thresholds. Connect
TH1 to GND or DBP. See Table 2 for available thresholds. Input has no internal
pullup or pulldown.
15
13
13
TH2
Threshold Selection Input 2. Logic input to select desired thresholds. Connect
TH2 to GND or DBP. See Table 2 for available thresholds. Input has no internal
pullup or pulldown.
16
14
14
TH3
Threshold Selection Input 3. Logic input to select desired thresholds. Connect
TH3 to GND or DBP. See Table 2 for available thresholds. Input has no internal
pullup or pulldown.
17
15
15
TH4
Threshold Selection Input 4. Logic input to select desired thresholds. Connect
TH4 to GND or DBP. See Table 2 for available thresholds. Input has no internal
pullup or pulldown.
18
16
16
SWT
Watchdog Timeout Adjust Input. Connect SWT to VCC to select the default
watchdog timeout period. Connect an external capacitor between SWT and
GND to adjust the watchdog timeout period. The adjustable timeout period is
calculated by tWP = 4.348E6 x CSWT (tWP in seconds and CSWT in Farads).
Disable the watchdog timer by connecting SWT to GND.
19
17
17
SRT
Reset Timeout Adjust Input. Connect SRT to VCC to select the default reset
timeout period. Connect an external capacitor between SRT and GND to adjust
the reset timeout period. The adjustable timeout period is calculated by tRP =
4.348E6 x CSWT (tRP in seconds and CSRT in Farads).
20
18
18
ENABLE
Active-Low, PG_ Enable Input. Pull ENABLE high to force all PG_ outputs low.
PG_ outputs remain asserted for their timeout period when ENABLE is
driven/pulled low. ENABLE is internally pulled down to GND through a 10µA
current sink.
21
19
19
VCC
Internal Supply Voltage. Bypass VCC to GND with a 1µF capacitor as close to
the device as possible. VCC supplies power to the internal circuitry. VCC is
internally powered from the highest of the monitored IN2–IN5 voltages. Do not
use VCC to supply power to external circuitry. To externally supply VCC, see the
Powering the MAX6892/MAX6893/MAX6894 section).
22
20
20
DBP
Digital Bypass Voltage. DBP supplies power to the output stages. Bypass DBP
to GND with a 1µF capacitor as close to the device as possible. Do not use
DBP to supply power to external circuitry.
23
IN8
Input Voltage 8. Select undervoltage threshold using TH0–TH4. See Table 2.
For improved noise immunity, bypass IN8 to GND with a 0.1µF capacitor as
close to the device as possible.
24
IN7
Input Voltage 7. Select undervoltage threshold using TH0–TH4. See Table 2.
For improved noise immunity, bypass IN7 to GND with a 0.1µF capacitor as
close to the device as possible.


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