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March 15, 2001
IDT77V011
TxDATA [11]
2
O
Normal
8-bit or 16-bit UTOPIA 2 output data bus used to transfer data to a PHY device. When in 8-bit mode use
TxDATA [7:0].
TxDATA [12]
143
O
Normal
8-bit or 16-bit UTOPIA 2 output data bus used to transfer data to a PHY device. When in 8-bit mode use
TxDATA [7:0].
TxDATA [13]
142
O
Normal
8-bit or 16-bit UTOPIA 2 output data bus used to transfer data to a PHY device. When in 8-bit mode use
TxDATA [7:0].
TxDATA [14]
141
O
Normal
8-bit or 16-bit UTOPIA 2 output data bus used to transfer data to a PHY device. When in 8-bit mode use
TxDATA [7:0].
TxDATA [15]
140
O
Normal
8-bit or 16-bit UTOPIA 2 output data bus used to transfer data to a PHY device. When in 8-bit mode use
TxDATA [7:0].
TSOC
134
O
Normal
UTOPIA 2 Transmit Start of Cell marker.
TCLAV
126
I
Normal
UTOPIA 2 Transmit Cell Available.
TENB
138
O
Normal
UTOPIA 2 Transmit Enable.
TxADDR[0]
129
O
Normal
UTOPIA 2 Transmit Address Bus [LSB].
I
Reset
Subport Byte Location. Indicates what byte the Tx and Rx Subport Address is located in [LSB].
TxADDR[1]
130
O
Normal
UTOPIA 2 Transmit Address Bus [LSB+1].
I
Reset
Subport Byte Location. Indicates what byte the Tx and Rx Subport Address is located in [LSB+1].
TxADDR[2]
131
O
Normal
UTOPIA 2 Transmit Address Bus [LSB+2].
I
Reset
Subport Byte Location. Indicates what byte the Tx and Rx Subport Address is located in [MSB].
TxADDR[3]
132
O
Normal
UTOPIA 2 Transmit Address Bus [LSB+3].
I
Reset
Initialize from EEPROM. Selects whether five bytes of EEPROM are to be written to In-Stream™ Cell
Header and In-Stream™ Subport. "0" do not write five byte value, "1" write five byte value from EEPROM.
TxADDR[4]
133
O
Normal
UTOPIA 2 Transmit Address Bus [MSB].
TxLED
137
O
Normal
UTOPIA 2 Transmit LED.
TCLK
128
O
Normal
UTOPIA 2 Transmit Clock.
TxPRTY
139
O
Normal
Parity for DTxDATA [15:0].
REFCLK
125
I
Normal
8 KHz reference clock used to generate TxREF.
TxREF
16
O
Normal
8KHz reference clock used by PHY.
EECLK
50
O
Normal
EEPROM Clock.
EECS
49
O
Normal
EEPROM Chip Select.
EEDIN
47
I
Normal
Serial Input from the EEPROM.
EEDOUT
48
O
Normal
Serial Output to the EEPROM.
BMODE
70
I
Normal
Bus Mode. Selects Motorola or Intel bus mode. "0" selects Motorola, "1" selects Intel.
MBUS[0]
67
O
UTOPIA 2 Address Bus. Upper 64 bytes used for 32 address pointers describing PHY's.
Utility Bus Utility bus PHY chip select (CS[1]).
I
Reset
TxSIZE[0] - Number of bytes to remove from cell in transmit direction (LSB).
MBUS[1]
66
O
UTOPIA 2 Address bus. Upper 64 bytes used for 32 address pointers describing PHY's.
Utility Bus Utility bus PHY chip select (CS[2]).
I
Reset
TxSIZE[1] - number of bytes to remove from cell in transmit direction (LSB + 1).
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