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A6300AJDL8A Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

Part # A6300AJDL8A
Description  High Efficiency Linear Power Supply
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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5
A6300
Pin Description
Pin Name
Function
1
RES or RES
Reset output
2
VSS
Supply ground
3
N.C.
Not connected
4
N.C.
Not connected
5
N.C.
Not connected
6
INPUT
Unregulated positive supply
7
OUTPUT
Regulated output
8
N.C.
Not connected
Table 5
Functional Description
Voltage Regulator
The A6300 has a 5 V ± 2%, 100 mA, low dropout volt-
age regulator. The low supply current (typ.100 µA) mak-
es the A6300 particularly suited to automotive systems
then remain energized 24 hours a day. The input voltage
range is 2.3 V to 26 V for operation and the input protec-
tion includes both reverse battery ( 20 V below ground)
and load dump (positive transients up to 60 V). There is
no reverse current flow from the OUTPUT to the INPUT
when the INPUT equals V
SS .This feature is important for
systems which need to implement (with capacitance) a
minimum power supply hold-up time in the event of
power failure. To achieve good load regulation a 22 µF
capacitor (or greater ) is needed on the INPUT (see
Fig. 5). Tantalum or aluminium electrolytics are adequate for
the 22 µF capacitor; film types will work but are relatively
expensive. Many aluminium electrolytics have electroly-
tes that freeze at about –30 °C, so tantalums are
recommended for operation below –25 °C. The important
parameters of the 22 µF capacitor are an effective series
resistance of 5 and a resonant frequency above
500 kHz.
A 10 µF capacitor (or greater) and a 100 nF capacitor
are required on the OUTPUT to prevent oscillations due
to instability. The specification of the 10 µF capacitor is
as per the 22 µF capacitor on the INPUT (see previous
paragraph).
The A6300 will remain stable and in regulation with no
external load and the dropout voltage is typically con-
stant as the input voltage fall to below its minimum level
(see Table 2). These features are especially important in
CMOS RAM keep-alive applications.
Voltage Monitoring
The power-on reset and the power-down reset are gene-
rated internally with a voltage comparison of the voltage
reference and the resistor divider (see Fig.4).
At power-up the reset output (RES) is held low (see
Fig. 3). After OUTPUT reaches V
TH, the RES output is
held low for an additional power-on-reset (POR) delay
t
POR
(typically 50 ms ).The power-on reset delay
prevents repeated toggling of RES even if V
OUTPUT and
the INPUT voltage drops out and recovers. The POR
delay allows the microprocessor’s crystal oscillator time
to stabilize and to ensure correct recognition of the reset
signal to the microprocessor.
The RES output goes active low generating the power-
down reset whenever V
OUTPUT falls below VTH. The sensi-
tivity or reaction time of the internal comparator to the
voltage level on V
IN is typically 70 µs.
Temperature Consideration
Care must be taken not to exceed the maximum junction
temperature (+ 125 °C). The power dissipation within
the A6300 is given by the formula:
T
TOTAL = (VINPUT – VOUTPUT) * IOUTPUT + (VINPUT) * ISS
The maximum continuous power dissipation at a given
temperature can be calculated using the formula:
P
max = ( 125 °C – TA) / Rth(j-a)
where R
th(j-a) is the termal resistance from the junction
to the ambient and is specified in Table 2. Note the R
th(j-a)
given in Table 2 assumes that the package is soldered
to a PCB. The above formula for maximum power dissi-
pation assumes a constant load(i.e. 100 s). The tran-
sient thermal resistance for a single pulse is much lower
than the continuous value. For example the A6300 in
DIP8 package will have an effective thermal resistance
from the junction to the ambient of about 10 °C/W for
a single 100 ms pulse.


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