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CS5461 Datasheet(PDF) 6 Page - Cirrus Logic |
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CS5461 Datasheet(HTML) 6 Page - Cirrus Logic |
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6 / 46 page  CS5461 6 DS546PP2 2. PIN DESCRIPTION VREFIN 12 Voltage Reference Input VREFOUT 11 Voltage Reference Output VIN- 10 Differential Voltage Input VIN+ 9 Differential Voltage Input MODE 8 Mode Select CS 7 Chip Select SDO 6 Serial Data Ouput SCLK 5 Serial Clock DGND 4 Digital Ground VD+ 3 Positive Power Supply CPUCLK 2 CPU Clock Output XOUT 1 Crystal Out VA- 13 Analog Ground VA+ 14 Positive Analog Supply IIN- 15 Differential Current Input IIN+ 16 Differential Current Input PFMON 17 Power Fail Monitor FOUT 18 High Frequency Output RESET 19 Reset INT 20 Interrupt EOUT 21 Energy Output EDIR 22 Energy Direction Indicator SDI 23 Serial Data Input XIN 24 Crystal In Clock Generator Crystal Out Crystal In 1,24 XOUT, XIN - A gate inside the chip is connected to these pins and can be used with a crystal to provide the system clock for the device. Alternatively, an external (CMOS compatible) clock can be supplied into XIN pin to provide the system clock for the device. CPU Clock Output 2 CPUCLK - Output of on-chip oscillator which can drive one standard CMOS load. Control Pins and Serial Data I/O Serial Clock Input 5 SCLK - A clock signal on this pin determines the input and output rate of the data for the SDI and SDO pins respectively. This is a Schmitt Trigger input to allow for slow rise time signals. The SCLK pin will recognize clocks only when CS is low. Serial Data Output 6 SDO -The serial data port output pin. Its output is in a high impedance state when CS is high. Chip Select 7 CS - When low, the port will recognize SCLK. An active high on this pin forces the SDO pin to a high impedance state. Mode Select 8 MODE - When at logic high, the CS5461 will operate in auto-boot mode. For normal operation this pin must be left unconnected. High-Frequency Energy Output 18 FOUT - Issues active-low pulses, such that the number of pulses is proportional to the measured real energy. The energy-to-pulse ratio is programmed in the PulseRateF Reg- ister. Reset 19 RESET - When reset is taken low, all internal registers are set to their default states. Interrupt 20 INT - When INT goes low it signals that an enabled event has occurred. Energy Output 21 EOUT - Issues fixed-width pulses, such that the number of pulses is proportional to the real energy registration of the device. The energy-to-pulse ratio is programmed in the PulseRateE Register. Energy Direction Indicator 22 EDIR - Indicates if the measured energy is negative. Serial Data Input 23 SDI - The serial data port input pin. Data will be input at a rate determined by SCLK. |
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