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ASM1232LPS-2F Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation |
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ASM1232LPS-2F Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation |
2 / 10 page ASM1232LP/LPS 2 of 10 Notice: The information in this document is subject to change without notice 5V µP Power Supply Monitor and Reset Circuit January 2005 rev 1.5 Pin Configuration Pin Description Pin # 8-Pin Package Pin # 16-Pin Package Pin Name Function 1 2 PBRST Debounced manual pushbutton RESET input. 24 TD Watchdog time delay selection. (tTD = 150ms for TD = GND, tTD = 610ms for TD=Open, and tTD = 1200ms for TD = VCC). 36 TOL Selects 5% (TOL connected to GND) or 10% (TOL connected to VCC) trip point tolerance. 4 8 GND Ground. 5 9 RESET Active HIGH reset output. RESET is active: 1. If VCC falls below the reset voltage trip point. 2. If PBRST is LOW. 3. If ST is not strobed LOW before the timeout period set by TD expires. 4. During power-up. 6 11 RESET Active LOW reset output. (See RESET). 713 ST Strobe input. 815 VCC 5V power. - 1,3,5,7, 10,12,14,16 NC No internal connection. 1 2 3 4 5 6 7 8 PBRST TD TOL GND VCC ST RESET RESET 1 2 3 4 5 6 7 8 PBRST TD TOL GND VCC ST RESET RESET ASM1232LPS 9 10 11 12 13 14 15 16 NC NC NC NC NC NC NC NC ASM1232LPU DIP/SO/MicroSO SO ASM1232LP ASM1232LPS-2 |
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