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POWER DISSIPATION RATINGS

ABSOLUTE MAXIMUM RATINGS

TB3R1, TB3R2

SLLS587B – NOVEMBER 2003 – REVISED MAY 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device

placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

PART NUMBER

PART MARKING

Package

LEAD FIISH

STATUS

TB3R1D

TB3R1

SOIC

NiPdAu

Production

TB3R2D

TB3R2

SOIC

NiPdAu

Production

TB3R1LD

TB3R1

SOIC

SnPb

Production

TB3R2LD

TB3R2

SOIC

SnPb

Production

POWER RATING

THERMAL RESISTANCE,

DERATING FAC-

POWER RATING

CIRCUIT BOARD

PACKAGE

JUNCTION-TO-AMBIENT

MODEL

WITH NO AIR FLOW

763 mW

131.1

°C/W

7.6 mW/

°C

305 mW

D

1190 mW

84.1

°C/W

11.9 mW/

°C

475 mW

831 mW

120.3

°C/W

8.3 mW/

°C

332 mW

DW

1240 mW

80.8

°C/W

12.4 mW/

°C

494 mW

(1)

In accordance with the low-K thermal metric definitions of EIA/JESD51-3.

(2)

In accordance with the high-K thermal metric definitions of EIA/JESD51-7.

THERMAL CHARACTERISTICS

PARAMETER

PACKAGE

VALUE

UNIT

D

47.5

°C/W

Junction-to-Board

θ

JB

Thermal Resistance

DW

53.7

°C/W

D

44.2

°C/W

Junction-to-Case

θ

JC

Thermal Resistance

DW

47.1

°C/W

UNIT

0 V to 6 V

6.5 V

All pins

±3 kV

ESD

All pins

±2 kV

Continuous power dissipation

See Dissipation Rating Table

-65

°C to 150°C

(1)

Stresses beyond those listed under,, absolute maximum ratings” may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under,, recommended operating

conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

Tested in accordance with JEDEC Standard 22, Test Method A114-A.

(3)

Tested in accordance with JEDEC Standard 22, Test Method C101.

2