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M347S6453CTS-C1H Datasheet(PDF) 5 Page - Samsung semiconductor |
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M347S6453CTS-C1H Datasheet(HTML) 5 Page - Samsung semiconductor |
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5 / 11 page  PC133/PC100 Unbuffered DIMM M374S6453CTS REV. 0.1 Sept. 2001 DC CHARACTERISTICS (Recommended operating condition unless otherwise noted, TA = 0 to 70 °C) Parameter Symbol Test Condition Version Unit Note -7C -7A -1H -1L Operating current (One bank active) ICC1 Burst length = 1 tRC ≥ tRC(min) IO = 0 mA 1170 1080 1080 1080 mA 1 Precharge standby cur- rent in power-down mode ICC2P CKE ≤ VIL(max), tCC = 10ns 36 mA ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞ 36 Precharge standby cur- rent in non power-down mode ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns 360 mA ICC2NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞ Input signals are stable 180 Active standby current in power-down mode ICC3P CKE ≤ VIL(max), tCC = 10ns 108 mA ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞ 108 Active standby current in non power-down mode (One bank active) ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns 540 mA ICC3NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞ Input signals are stable 450 mA Operating current (Burst mode) ICC4 IO = 0 mA Page burst 4banks Activated. tCCD = 2CLKs 1260 1260 1170 1170 mA 1 Refresh current ICC5 tRC ≥ tRC(min) 2250 2070 1980 1980 mA 2 Self refresh current ICC6 CKE ≤ 0.2V C 54 mA L 27 mA 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ). Notes : |
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