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25LC256-ISN Datasheet(PDF) 9 Page - Microchip Technology |
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25LC256-ISN Datasheet(HTML) 9 Page - Microchip Technology |
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9 / 26 page  2003 Microchip Technology Inc. Preliminary DS21822C-page 9 25AA256/25LC256 2.4 Write Enable (WREN) and Write Disable (WRDI) The 25XX256 contains a write enable latch. See Table 2-4 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. The following is a list of conditions under which the write enable latch will be reset: • Power-up • WRDI instruction successfully executed • WRSR instruction successfully executed • WRITE instruction successfully executed FIGURE 2-4: WRITE ENABLE SEQUENCE (WREN) FIGURE 2-5: WRITE DISABLE SEQUENCE (WRDI) SCK 0 2 34 56 7 1 SI high-impedance SO CS 01 00 00 0 1 SCK 0 2345 67 1 SI high-impedance SO CS 01 00 00 0 10 |
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