USB Peripheral Controller

with SPI Interface

10

______________________________________________________________________________________

Note 2: Design guaranteed by bench testing. Limits are not production tested.

Note 4: The minimum period is derived from SPI timing parameters.

Note 5: Time-to-exit suspend is dependent on the crystal used.

Note 6: Redesign in progress to meet USB specification.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

USB TRANSMITTER TIMING CHARACTERISTICS

D+, D- Rise Time

4

20

ns

D+, D- Fall Time

4

20

ns

Rise-/Fall-Time Matching

90

110

%

Output-Signal Crossover Voltage

1.3

2.0

V

77.0

Serial Clock (SCLK) Period (Note 4)

38.4

ns

SCLK Pulse-Width High

17

ns

SCLK Pulse-Width Low

17

ns

SS Fall-to-MISO Valid

20

ns

SS Leading Time Before the First

SCLK Edge

30

ns

SS Trailing Time After the Last

SCLK Edge

30

ns

Data-In Setup Time

5ns

Data-In Hold Time

10

ns

SS Pulse High

200

ns

SCLK Fall-to-MISO Propagation

Delay

14.2

ns

SCLK Fall-to-MOSI Propagation

Delay

14.2

ns

SCLK Rise-to-MOSI Drive

3.5

ns

SS High-to-MOSI High

Impedance

20

ns

SUSPEND TIMING CHARACTERISTICS

Time-to-Enter Suspend

PWRDOWN = 1 to oscillator stop

5

µs

Time-to-Exit Suspend

PWRDOWN = 1 to 0 to OSCOKIRQ (Note 5)

3

ms

TIMING CHARACTERISTICS

(

*33pF capacitor will not be required after redesign.