HY57V161610ET-5I datasheet(6/13 Pages) HYNIX

Part #	HY57V161610ET-5I

Description	2 Banks x 512K x 16 Bit Synchronous DRAM

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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6 / 13 page

HY57V161610ET-I

Rev. 0.1 / Nov. 2003

6

DC CHARACTERISTICS II (TA= -40°C to 85°C, VDD=3.0V to 3.6V, VSS=0VNote1,2)

Note :

1.VDD(min) is 3.15V when HY57V161610ET-7I operates at CAS latency=2 and tCK2=8.9ns.

2.VDD(min) of HY57V161610ET-5I/55I is 3.15V

3.IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open.

Parameter

Symbol

Test Condition

Speed

Unit

Note

-5

-55

-6

-7

-8

-10

-15

Operating Current

IDD1

Burst Length=1, One bank active

tRAS

≥ tRAS(min),tRP ≥ tRP(min),

IO=0mA

130

120

110

100

mA

2

Precharge Standby

Current

in power down mode

IDD2P

CKE

≤ VIL(max), tCK = 15ns

2

mA

IDD2PS

CKE

≤ VIL(max), tCK = ∞

1

Precharge Standby

Current

in non power down

mode

IDD2N

CKE

≥ VIH(min), CS ≥ VIH(min), tCK =

15ns

Input signals are changed one time

during 2Clks. All other pins

≥ VDD-0.2V

or

≤ 0.2V

25

mA

IDD2NS

CKE

≥ VIH(min), tCK = ∞

Input signals are stable.

15

Active Standby Current

in power down mode

IDD3P

CKE

≤ VIL(max), tCK = min

3.0

mA

IDD3PS

CKE

≤ VIL(max), tCK = ∞

3.0

Active Standby Current

in non power down

mode

IDD3N

CKE

≥ VIH(min), CS ≥ VIH(min), tCK =

min

Input signals are changed one time

during 2CLKs. All other pins

≥ VDD-

0.2V or

≤ 0.2V

50

mA

IDD3NS

CKE

≥ VIH(min), tCK = ∞

Input signals are stable

30

Burst Mode Operating

Current

IDD4

tCK

≥ tCK(min),

tRAS

≥ tRAS(min),

IO=0mA

All banks active

CL=3

130

120

110

90

80

mA

3

CL=2

--

110

--

-

CL=1

--

-

--

70

Auto Refresh Current

IDD5

tRRC

≥ tRRC(min), All banks active

130

110

100

mA

Self Refresh Current

IDD6

CKE

≤ 0.2V

2mA

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