HY57V161610ET-15I datasheet(10/13 Pages) HYNIX

Part #	HY57V161610ET-15I

Description	2 Banks x 512K x 16 Bit Synchronous DRAM

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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10 / 13 page

HY57V161610ET-I

Rev. 0.1 / Nov. 2003

10

AC CHARACTERISTICS (TA=-40°C to 85°C, VDD=3.0V to 3.6V, VSS=0VNote1,2)

- continued -

Note :

1. VDD(min) is 3.15V when HY57V161610ET-7I operates at CAS latency=2 and tCK2=8.9ns.

2.VDD(min) of HY57V161610ET-5I/55I is 3.15V

3. A new command can be given tRRC after self refresh exit.

DEVICE OPERATING OPTION TABLE

HY57V161610ET-5I

Paramter

Symbol

-8

-10

-15

Unit

Note

Min

Max

Min

Max

Min

Max

RAS cycle time

Operation

tRC

70

-

70

-

70

-

ns

Auto Refresh

tRRC

70

-

80

-

80

-

ns

RAS to CAS delay

tRCD

20

-

20

-

20

-

ns

RAS active time

tRAS

45

100K

45

100K

45

100K

ns

RAS precharge time

tRP

3

-

2

-

2

-

CLK

RAS to RAS bank active delay

tRRD

2

-

2

-

2

-

CLK

CAS to CAS bank active delay

tCCD

1

-

1

-

1

-

CLK

Write command to data-in delay

tWTL

0

-

0

-

0

-

CLK

Data-in to precharge command

tDPL

1

-

1

-

1

-

CLK

Data-in to active command

tDAL

4

-

3

-

3

-

CLK

DQM to data-in Hi-Z

tDQZ

2

-

2

-

2

-

CLK

DQM to data mask

tDQM

0

-

0

-

0

-

CLK

MRS to new command

tMRD

2

-

2

-

2

-

CLK

Precharge to data output Hi-Z

tPROZ

3

-

3

-

3

-

CLK

Power down exit time

tPDE

1

-

1

-

1

-

CLK

Self refresh exit time

tSRE

1

-

1

-

1

-

CLK

3

Refresh Time

tREF

-

64

-

64

-

64

ms

CAS Latency

tRCD

tRAS

tRC

tRP

tAC

tOH

200MHz

3CLKs

8CLKs

11CLKs

3CLKs

4.5ns

1.5ns

183MHz

3CLKs

7CLKs

10CLKs

3CLKs

5ns

2ns

166MHz

3CLKs

7CLKs

10CLKs

3CLKs

5.5ns

2ns

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