Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

MT49H8M36 Datasheet(PDF) 1 Page - Micron Technology

Part # MT49H8M36
Description  288Mb CIO Reduced Latency
Download  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICRON [Micron Technology]
Direct Link  http://www.micron.com
Logo MICRON - Micron Technology

MT49H8M36 Datasheet(HTML) 1 Page - Micron Technology

  MT49H8M36 Datasheet HTML 1Page - Micron Technology MT49H8M36 Datasheet HTML 2Page - Micron Technology MT49H8M36 Datasheet HTML 3Page - Micron Technology MT49H8M36 Datasheet HTML 4Page - Micron Technology MT49H8M36 Datasheet HTML 5Page - Micron Technology MT49H8M36 Datasheet HTML 6Page - Micron Technology MT49H8M36 Datasheet HTML 7Page - Micron Technology MT49H8M36 Datasheet HTML 8Page - Micron Technology MT49H8M36 Datasheet HTML 9Page - Micron Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 49 page
background image
Products and specifications discussed herein are subject to change by Micron without notice.
288Mb: x36, x18, x9 2.5V VEXT, 1.8V VDD, HSTL, RLDRAM II
Features
PDF: 09005aef80a41b46/Source: 09005aef809f284b
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT49H8M36_1.fm - Rev. H 8/05 EN
1
©2002 Micron Technology, Inc. All rights reserved.
288Mb CIO Reduced Latency (RLDRAM® II)
MT49H8M36
MT49H16M18
MT49H32M9
For the latest data sheet, refer to Micron’s Web site: www.micron.com/rldram
Features
• 400 MHz DDR operation (800 Mb/s/pin data rate)
• Organization
8 Meg x 36, 16 Meg x 18, and 32 Meg x 9
8 banks
• Cyclic bank switching for maximum bandwidth
• Reduced cycle time (20ns at 400 MHz)
• Nonmultiplexed addresses (address multiplexing
option available)
• SRAM-type interface
• Programmable READ latency (RL), row cycle time,
and burst sequence length
• Balanced READ and WRITE latencies in order to
optimize data bus utilization
• Data mask for WRITE commands
• Differential input clocks (CK, CK#)
• Differential input data clocks (DKx, DKx#)
• On-chip DLL generates CK edge-aligned data and
output data clock signals
• Data valid signal (QVLD)
• 32ms refresh (8K refresh for each bank; 64K refresh
command must be issued in total each 32ms)
• 144-ball µBGA package
• HSTL I/O (1.5V or 1.8V nominal)
•25Ω–60Ω matched impedance outputs
• 2.5V VEXT, 1.8V VDD, 1.5V or 1.8V VDDQ I/O
• On-die termination (ODT) RTT
Table 1:
Valid Part Numbers
Part Number
Description
MT49H8M36FM-xx
8 Meg x 36 RLDRAM II
MT49H16M18FM-xx
16 Meg x 18 RLDRAM II
MT49H32M9FM-xx
32 Meg x 9 RLDRAM II
Figure 1:
144-Ball µBGA
Notes: 1. Contact Micron for availability of lead-free
products.
Options
Marking
• Clock cycle timing
2.5ns (400 MHz)
3.3ns (300 MHz)
5ns (200 MHz)
-25
-33
-5
• Configuration
8 Meg x 36
16 Meg x 18
32 Meg x 9
MT49H8M36
MT49H16M18
MT49H32M9
• Operating temperature range
Commercial
0° to +95°C
Industrial
TC = -40°C to +95°C
TA = -40°C to 85°C)
None
IT
•Package
144-ball µBGA
(11mm x 18.5mm, lead-free)
FM
BM1


Similar Part No. - MT49H8M36

ManufacturerPart #DatasheetDescription
logo
Micron Technology
MT49H8M36 MICRON-MT49H8M36 Datasheet
2Mb / 76P
   288Mb: x9, x18, x36 2.5V VEXT, 1.8V VDD, HSTL, CIO, RLDRAM II
More results

Similar Description - MT49H8M36

ManufacturerPart #DatasheetDescription
logo
Micron Technology
MT49H16M18C MICRON-MT49H16M18C Datasheet
1Mb / 44P
   288Mb SIO REDUCED LATENCY(RLDRAM II)
MT49H8M32 MICRON-MT49H8M32 Datasheet
652Kb / 43P
   REDUCED LATENCY DRAM RLDRAM
logo
GSI Technology
GS4288C09 GSI-GS4288C09 Datasheet
2Mb / 62P
   32M x 9, 16M x 18, 8M x 36 288Mb CIO Low Latency DRAM (LLDRAM) II
GS4576C36GL-25I GSI-GS4576C36GL-25I Datasheet
2Mb / 63P
   576Mb CIO Low Latency DRAM (LLDRAM II)
logo
Infineon Technologies A...
HYB18RL25632AC INFINEON-HYB18RL25632AC Datasheet
941Kb / 37P
   256 Mbit DDR Reduced Latency DRAM
V1.60 July 2003
logo
Micron Technology
MT49H32M9 MICRON-MT49H32M9 Datasheet
2Mb / 76P
   288Mb: x9, x18, x36 2.5V VEXT, 1.8V VDD, HSTL, CIO, RLDRAM II
logo
GSI Technology
GS4576C09 GSI-GS4576C09 Datasheet
2Mb / 62P
   64M x 9, 32M x 18, 16M x 36 576Mb CIO Low Latency DRAM (LLDRAM II)
GS82582D38GE-400 GSI-GS82582D38GE-400 Datasheet
453Kb / 27P
   288Mb SigmaQuad-II 288Mb SigmaQuad-II
logo
Zilog, Inc.
Z8036 ZILOG-Z8036 Datasheet
3Mb / 79P
   Z-CIO AND CIO COUNTER / TIMER AND PARALLRL I/O UNIT
logo
Samsung semiconductor
K4C89183AF SAMSUNG-K4C89183AF Datasheet
1Mb / 55P
   288Mb x18 Network-DRAM2 Specification
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com