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AS91L1006S10L100C Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers

Part # AS91L1006S10L100C
Description  The AS91L1006BU is a one to 6-port JTAG gateway
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July 2004
AS91L1006BU
AS91L1006BU device Register descriptions
Bypass Register
It is a mandatory single bit register that can
be connected between PRIM_TDI and PRIM_TDO
of the AS91L1006BU device.
Multi-Cast Group Register
This 2-bit data register enables the host
system to place the AS91L1006BU into one of
four distinct addressable groups.
MCGR Register Bits
[1..0]
Binary Selection Address
MCGR GROUP
00
XX111100
GRP0
01
XX111101
GRP1
10
XX111110
GRP2
11
XX111111
GRP3
Table 5 - Multicast Group Register Mapping
Note: The MCGR is reset to 00 upon receiving TRST or the entering of the Test-Logic-Reset
state
.
IDCODE Register
It is an optional 32-bit register that can be
connected between PRIM_TDI and PRIM_TDO of
the AS91L1006BU device. The contents of the
IDCODE register will be loaded with the following
data when the AS91L1006BU enters Test-Logic-
Reset or passes through Capture-IR:
"00000000000000001000001101101111"
Bits 0 to 11 indicate ALSC Jedec ID value of:
“001101101111”
Bits 12 to 27 indicate the part number of the
device: “0000000000010000”
Bits 28 to 31 indicate the revision of the device:
“0000”
USERCODE Register
The USERCODE is an 8-bit register that can
be
addressed
via
standard
IEEE1149.1
commands, which are automatically generated by
third party test tools. AS91L1006BU returns all
zeroes if read from this registerUSERUSER and
does have the ability to write into this register.
* The AS91L1006BU is a complete second source and pin for pin replacement of the
Firecron JTS06BU device.
www.alsc.com
Alliance Semiconductor
6
2003, 2004 © Copyright Alliance Semiconductor Corporation. All Rights reserved.


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