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H27UCG8T2BTR-BC Datasheet(PDF) 40 Page - Hynix Semiconductor

Part No. H27UCG8T2BTR-BC
Description  64Gb(8192M x 8bit) MLC NAND Flash
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Maker  HYNIX [Hynix Semiconductor]
Homepage  http://www.skhynix.com/ko/index.jsp
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H27UCG8T2BTR-BC
64Gb(8192M x 8bit) MLC NAND Flash
Rev 0.1 / Oct. 2012
40
Figure 35 : Multi plane page read
4.4. Multi Plane Page Read
Multi-Plane Page Read is an extension of Page Read, for a single plane with 17,664byte page registers. Since the
device is equipped with two memory planes, activating the two sets of 17,664byte page resisters enables a
random read of two pages. Multi-Plane Page Read is initiated by repeating command 60h followed by three
address cycles twice. In this case, only same page of each block can be selected from each plane.
After Read Confirm command (30h) the 17,664bytes of data within the selected two pages are transferred to the
data registers in less than tR. The system controller can detect the completion of data transfer (tR) by monitoring
the output of R/B# pin.
Once the data is loaded into the data registers, the data output of first plane can be read out by issuing
command 00h with Five Address Cycles, command 05h with two column address and finally E0h. The data
output of second plane can be read out using the identical command sequences. The restrictions for Multi-Plane
Page Read are shown in Figure 35. Multi-Plane Page Read must be used in the block which has been
programmed with Multi-Plane Page Program.




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