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H27UCG8T2BTR-BC Datasheet(PDF) 5 Page - Hynix Semiconductor

Part No. H27UCG8T2BTR-BC
Description  64Gb(8192M x 8bit) MLC NAND Flash
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Maker  HYNIX [Hynix Semiconductor]
Homepage  http://www.skhynix.com/ko/index.jsp
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H27UCG8T2BTR-BC
64Gb(8192M x 8bit) MLC NAND Flash
Rev 0.1 / Oct. 2012
5
3.18. Random Data Input Timings …………………………………………………………………………………
3.19. Multi Plane Page Program Operation Timings …………………………………………………………..
3.20. Copy-Back Program Operation Timings with Random Date Input .………………………………..
3.21. Cache Program Operation Timings …………………………………………………………………………
3.22. Multi Plane Cache Program Operation Timings ………………………………………………………….
3.23. Block Erase Operation Timings ………………………………………………………………………………
3.24. Multi Plane Erase Operation Timings ......................................................................................
3.25. Reset Timings ……………………………………………………………………………………………………
4. Device Operation ……………………………………………………………………………………………………
4.1. Page Read …………………………………………………………………………………………………………..
4.2. Cache Read …………………………………………………………………………………………………………
4.3. Cache Read Enhanced …………………………………………………………………………………………..
4.4. Multi Plane Page Read …………………………………………………………………………………………..
4.5. Multi Plane Cache Read ………………………………………………………………………………………...
4.6. Multi Plane Cache Read Enhanced …………………………………………………………………………..
4.7. Read ID ……………………………………………………………………………………………………………..
4.8. Read Status Register …………………………………………………………………………………………….
4.9. Page Program ……………………………………………………………………………………………………..
4.10. Multi Plane Program ……………………………………………………………………………………………
4.11. Cache Program .………………………………………………………………………………………………….
4.12. Multi Plane Cache Program .………………………………………………………………………………….
4.13. Copy-Back Program …………………………………………………………………………………………….
4.14. Multi-Plane Copy-Back Program …………………………………………………………………………….
4.15. Block Erase ………………………………………………………………………………………………………..
4.16. Multi Plane Block Erase ………………………………………………………………………………………..
4.17. Reset ……………………………………………………………………………………………………………….
5. Other Features …………………………………………………………………………………………………………
5.1. Data Protection & Power on/off Sequence …………………………………………………………………
5.2. Ready / Busy .………………………………………………………………………………………………………
5.3. Write Protect Operation …………………………………………………………………………………………
6. Application Notes and Comments ...…………….……………………….………………………………………
6.1. Paired Page Address Information ..…………………………………………………………………………..
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