深圳市天微电子有限公司

S

S

S

SH

H

H

HE

E

E

EN

N

N

NZH

ZH

ZH

ZHE

E

E

EN

N

N

N TI

TI

TI

TIT

T

T

TA

A

A

AN

N

N

N M

M

M

M IIIIC

C

C

CR

R

R

RO

O

O

O E

E

E

EL

L

L

LE

E

E

EC

C

C

CT

T

T

TR

R

R

RO

O

O

ON

N

N

NIIII C

C

C

CS

S

S

S C

C

C

CO

O

O

O.... ,,,,L

L

L

LT

T

T

TD

D

D

D....

PIN

PIN

PIN

PIN CONFIGURATION

CONFIGURATION

CONFIGURATION

CONFIGURATION

GND

GRID1

GRID2

GND

GRID3

GRID4

GND

VDD

SEG14/GRID5

SEG13/GRID6

SEG12/GRID7

SEG10

SEG9

SEG8/KS8

NC

DIO

SCLK

STB

K1

K2

VDD

SG1/KS1

SG2/KS2

SG3/KS3

SG4/KS4

SG5/KS5

SG6/KS6

SG7/KS7

PIN

PIN

PIN

PIN DESCRIPTION

DESCRIPTION

DESCRIPTION

DESCRIPTION

Add：522,5/F,Bldg. No.4,Keji Central Road 2, Software Park,High-Tech Industrial Park,Shenzhen

Tel：86-755-86185092

Web： www.titanmec.com

Fax： 86-755-86185093

2

Pin Name

I/O

Description

Pin No.

DIO

I/O

Data Input Output Pin

( N-Channel , Open-Drain) This pin

outputs serial data at the falling edge of

the shift clock. This pin inputs serial data

at the rising edge of the shift clock

(starting from the lower bit)

2

SCLK

I

Clock Input Pin

This pin reads serial data at the rising

edge and outputs data at the falling edge.

3

STB

I

Serial Interface Strobe Pin

The data input after the STB has fallen is

processed as a command. When t his pin

is "HIGH", CLK is ignored.

4

K1，K2

I

Key Data Input Pins

The data sent to these pins are latched at

the end of the display cycle.(Internal

Pull-Low Resistor)

5，6

GND

-

Ground Pin

22，25，28

SEG1-SEG8

O

Segment Output Pins (p - channel, open

drain) Also acts as the Key Source

8-15

SEG9-SEG10

O

Segment Output pins (P-Channel, open

drain)

16，17

SG12-SEG14

O

Segment/Grid Output Pins

18-20

VDD

-

Power Supply

21

GRID1-GRID4

O

Grid Output Pins

23，24，26，27

1

No Connection

1

1

28

2

TM1

TM1

TM1

TM16

6

6

628

28

28

28

27

3

26

4

25

5

24

6

23

7

22

8

21

9

20

10

19

11

18

12

17

13

16

14

15