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RF96 Datasheet(PDF) 29 Page - HOPE Microelectronics CO., Ltd.

Part No. RF96
Description  Low Power Long Range Transceiver
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Maker  HOPE [HOPE Microelectronics CO., Ltd.]
Homepage  https://www.hoperf.com/
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 29 page
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Page 29
RF96/97/98
Tel: +86-755-82973805
Fax: +86-755-82973550
E-mail: sales@hoperf.com http://www.hoperf.com
WIRELESS & SENSING
PRELIMINARY
DATASHEET
4.1.2. LoRa
TM Digital Interface
The LoRaTM modem comprises three types of digital interface, static configuration registers, status registers and a FIFO
data buffer. All are accessed through the RF96/97/98
ā€Ÿs SPI interface - full details of each type of register are given below.
Full listings of the register addresses used for SPI access are given in Section 6.4.
4.1.2.1. LoRa
TM Configuration Registers
Configuration registers are accessed through the SPI interface. Registers are readable in all device mode including Sleep.
However, they should be written only in Sleep and Stand-by modes. Please note that the automatic top level
sequencer (TLS modes) are not available in LoRaTM mode
and the configuration register mapping changes as
shown in Table
85. The content of the LoRaTM configuration registers is retained in FSK/OOK mode. For the functionality of
mode registers common to both FSK/OOK and LoRaTM mode, please consult the Analog and RF Front End section of this
document (Section 5).
4.1.2.2. Status Registers
Status registers provide status information during receiver operation.
4.1.2.3. LoRa
TM Mode FIFO Data Buffer
Overview
The RF96/97/98 is equipped with a 256 byte RAM data buffer which is uniquely accessible in LoRa mode. This RAM
area, thereafter reffered to as the FIFO Data buffer, is fully customizable by the user and allows access to the received, or
to be transmitted, data. All access to the LoRaTM FIFO data buffer is done via the SPI interface. A diagram of the user
defined memory mapping of the FIFO data buffer is shown below. These FIFO data buffer can be read in all operating
modes except sleep and store data related to the last receive operation performed. It is automatically cleared of old content
upon each new transition to receive mode.
Figure 7. LoRa
TM data buffer




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