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RF96 Datasheet(PDF) 5 Page - HOPE Microelectronics CO., Ltd.

Part No. RF96
Description  Low Power Long Range Transceiver
Download  121 Pages
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Maker  HOPE [HOPE Microelectronics CO., Ltd.]
Homepage  https://www.hoperf.com/
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 5 page
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Page 5
Tel: +86-755-82973805
Fax: +86-755-82973550
E-mail: sales@hoperf.com http://www.hoperf.com
RF96/97/98
Section
Page
Table 1. RF96/97/98 Device Variants and Key Parameters ...........................................................................................10
Table 2. Absolute Maximum Ratings .............................................................................................................................12
Table 3. Operating Range .............................................................................................................................................12
Table 4. Power Consumption Specification ...................................................................................................................13
Table 5. Frequency Synthesizer Specification ..............................................................................................................13
Table 6. FSK/OOK Receiver Specification ....................................................................................................................14
Table 7. Transmitter Specification .................................................................................................................................15
Table 8. LoRa Receiver Specification. ..........................................................................................................................17
Table 9. Digital Specification .........................................................................................................................................19
Table 10. Example LoRaTM Modem Performances .....................................................................................................22
Table 11. Range of Spreading Factors ..........................................................................................................................24
Table 12. Cyclic Coding Overhead ................................................................................................................................24
Table 13. LoRaTM Operating Mode Functionality .........................................................................................................31
Table 14. LoRa CAD Consumption Figures ..................................................................................................................40
Table 15. DIO Mapping LoRaTM Mode .........................................................................................................................41
Table 16. Bit Rate Examples .........................................................................................................................................42
Table 17. Preamble Detector Settings ...........................................................................................................................48
Table 18. RxTrigger Settings to Enable Timeout Interrupts ..........................................................................................49
Table 19. Basic Transceiver Modes ..............................................................................................................................50
Table 20. Receiver Startup Time Summary ..................................................................................................................51
Table 21. Receiver Startup Options ..............................................................................................................................54
Table 22. Sequencer States ..........................................................................................................................................55
Table 23. Sequencer Transition Options .......................................................................................................................56
Table 24. Sequencer Timer Settings .............................................................................................................................58
Table 25. Status of FIFO when Switching Between Different Modes of the Chip .........................................................62
Table 26. DIO Mapping, Continuous Mode ...................................................................................................................64
Table 27. DIO Mapping, Packet Mode ..........................................................................................................................64
Table 28. CRC Description ...........................................................................................................................................72
Table 29. Power Amplifier Mode Selection Truth Table ................................................................................................78
Table 30. High Power Settings ......................................................................................................................................79
Table 31. Operating Range, +20dBm Operation ...........................................................................................................79
Table 32. Operating Range, +20dBm Operation ...........................................................................................................79
Table 33. Trimming of the OCP Current ........................................................................................................................80
Table 34. LNA Gain Control and Performances ............................................................................................................81
Table 35. RssiSmoothing Options .................................................................................................................................82
Table 36. Available RxBw Settings ................................................................................................................................82
Table 37. Registers Summary .......................................................................................................................................84
Table 38. Register Map .................................................................................................................................................87
Table 39. Low Frequency Additional Registers ...........................................................................................................100




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