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ALC888S-VD Datasheet(PDF) 33 Page - Realtek Semiconductor Corp.

Part No. ALC888S-VD
Description  7.12 CHANNEL HD AUDIO CODEC WITH TWO INDEPENDENT SPDIF OUTPUTS
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Maker  REALTEK [Realtek Semiconductor Corp.]
Homepage  https://www.realtek.com/en/
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 33 page
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ALC888S-VD
Datasheet
7.1+2 Channel HD Audio Codec with Two Independent
SPDIF Outputs
25
Track ID: JATR-2265-11
Rev. 1.2
7.4.2.
Response Format
There are two types of response from the codec to the controller. Solicited Responses are returned by the
codec in response to a current command verb. The codec will send Solicited Response data in the next
frame, without regard to the Set (Write) or Get (Read) command. The 32-bit Response is interpreted by
software, opaque to the controller.
Unsolicited Responses are sent by the codec independently of software requests. Jack Detection or GPI
status information can be actively delivered to the controller and interpreted by software. The ‘Tag’ in
Bit[31:28] is used to identify unsolicited events. This tag is undefined in the HDA specifications.
Table 12. Solicited Response Format
Bit [35]
Bit [34]
Bit [33:32]
Bit [31:0]
Valid
Unsol=0
Reserved
Response
Table 13. Unsolicited Response Format
Bit [35]
Bit [34]
Bit [33:32]
Bit [31:28]
Bit [27:0]
Valid
Unsol=1
Reserved
Tag
Response
Note: The response stream in the link protocol is 36-bit wide. The response is placed in the lower 32-bit field. Bit 35 is a
‘Valid’ bit to indicate the response is ‘Ready’. Bit 34 is set to indicate that an unsolicited response was sent.
7.5. Power Management
All power management state changes in widgets are driven by software. Table 14 shows the System
Power State Definitions. To simplify power management in the ALC888S-VD, only the Audio Function
(NID=01h) supports power control. Output converters (DACs) and input converters (ADCs) have no
individual power control. Software can configure whole codec power states through the audio function
(NID=01h). Software may have various power states depending on system configuration.
Table 15 indicates those nodes that support power management.
7.5.1.
System Power State Definitions
Table 14. System Power State Definitions
Power States
Definitions
D0
All Power On. Individual DACs and ADCs can be powered up or down as required.
D1
All Converters (DACs and ADCs) are Powered Down. State maintained, analog reference stays up.
D2
Power is Still Supplied. All amplifiers and converters (DACs and ADCs) are powered down.
Codec stops PLL. State maintained. Jack-detection and GPI are powered down.
D3 (Hot)
Power is Still Supplied. All amplifiers and converters (DACs and ADCs) are powered down.
Codec stops PLL. State maintained. Jack-detection/GPI work.
D3 (Cold)
Power is Still Supplied. All amplifiers and converters (DACs and ADCs) are powered down.
Codec stops PLL. State maintained. Jack-detection/GPI work when internal OSC powers up.




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