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ICE3BR4765JZ Datasheet(PDF) 8 Page - Infineon Technologies AG

Part No. ICE3BR4765JZ
Description  Off-Line SMPS Current Mode Controller
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Maker  INFINEON [Infineon Technologies AG]
Homepage  http://www.infineon.com
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 8 page
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Version 2.1
8
30 Aug 2011
ICE3BR4765JZ
Functional Description
3
Functional Description
All values which are used in the functional description
are typical values. For calculating the worst cases the
min/max values which can be found in section 4
Electrical Characteristics have to be considered.
3.1
Introduction
ICE3BR4765JZ is derived from ICE3BR4765J in DIP-7
package. CoolSET®-F3R jitter series (ICE3BRxx65J) is
the latest version of the CoolSET®-F3 for the lower
power application. The particular enhanced features
are the built-in features for soft start, blanking window
and frequency jitter. It provides the flexibility to increase
the blanking window by simply addition of a capacitor
in BA pin. In order to further increase the flexibility of
the protection feature, an external auto-restart enable
features are added. Moreover, the proven outstanding
features in CoolSET®-F3 are still remained such as the
active burst mode, propagation delay compensation,
modulated gate driving, auto-restart protection for Vcc
overvoltage, over temperature, over load, open loop,
etc.
The intelligent Active Burst Mode can effectively obtain
the lowest Standby Power at light load and no load
conditions. After entering the burst mode, there is still a
full control of the power conversion to the output
through the optocoupler, that is used for the normal
PWM control. The response on load jumps is optimized
and the voltage ripple on Vout is minimized. The Vout is
on well controlled in this mode.
The usually external connected RC-filter in the
feedback line after the optocoupler is integrated in the
IC to reduce the external part count.
Furthermore a high voltage Startup Cell is integrated
into the IC which is switched off once the Undervoltage
Lockout on-threshold of 18V is exceeded. This Startup
Cell is part of the integrated CoolMOS®. The external
startup resistor is no longer necessary as this Startup
Cell is connected to the Drain. Power losses are
therefore reduced. This increases the efficiency under
light load conditions drastically.
Adopting the BiCMOS technology, it can increase the
design flexibility as the Vcc voltage range is increased
to 25V.
The CoolSET®-F3R has a built-in 20ms soft start
function. It can further save external component
counts.
There are 2 modes of blanking time for high load
jumps; the basic mode and the extendable mode. The
blanking time for the basic mode is set at 20ms while
the extendable mode will increase the blanking time by
adding an external capacitor at the BA pin in addition to
the basic mode blanking time. During this blanking time
window the overload detection is disabled. With this
concept no further external components are necessary
to adjust the blanking window.
In order to increase the robustness and safety of the
system, the IC provides Auto Restart protection. The
Auto Restart Mode reduces the average power
conversion to a minimum level under unsafe operating
conditions. This is necessary for a prolonged fault
condition which could otherwise lead to a destruction of
the SMPS over time. Once the malfunction is removed,
normal operation is automatically retained after the
next Start Up Phase. To make the protection more
flexible, an external auto-restart enable pin is provided.
When the pin is triggered, the switching pulse at gate
will stop and the IC enters the auto-restart mode after
the pre-defined spike blanking time.
The internal precise peak current control reduces the
costs for the transformer and the secondary diode. The
influence of the change in the input voltage on the
maximum power limitation can be avoided together
with the integrated Propagation Delay Compensation.
Therefore the maximum power is nearly independent
on the input voltage, which is required for wide range
SMPS. Thus there is no need for the over-sizing of the
SMPS, e.g. the transformer and the output diode.
Furthermore, this F3R series implements the
frequency jitter mode to the switching clock such that
the EMI noise will be effectively reduced.
3.2
Power Management
Figure 3
Power Management
Internal Bias
Voltage
Reference
Power Management
5.0V
Undervoltage Lockout
18V
10.5V
Power-Down Reset
Active Burst
Mode
Auto Restart
Mode
Startup Cell
VCC
Drain
Depl. CoolMOS
Soft Start block




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