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PM25LD512 Datasheet(PDF) 15 Page - List of Unclassifed Manufacturers

Part No. PM25LD512
Description  512Kbit/1 Mbit / 2 Mbit Single Operating Voltage Serial Flash Memory With 100 MHz Dual-Output SPI Bus
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Maker  ETC2 [List of Unclassifed Manufacturers]
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Pm25LD512/010/ 020
Confidential information
Chingis Technology Corp.
15
DRAFT Date: August, 2010, Rev:0.4
DEVICE OPERATION (CONTINUED)
WRITE ENABLE OPERATION
The Write Enable (WREN) instruction is used to set the
Write Enable Latch (WEL) bit. The WEL bit of the
Pm25LD512/010/020 is reset to the write –protected
state after power-up. The WEL bit must be write
enabled before any write operation, including sector,
block erase, chip erase, page program and write status
register operations. The WEL bit will be reset to the
write-protect state automatically upon completion of a
write operation. The WREN instruction is required
before any above operation is executed.
Figure 6. Write Enable Sequence
WRDI COMMAND (WRITE DISABLE) OPERATION
The Write Disable (WRDI) instruction resets the WEL
bit and disables all write instructions. The WRDI
instruction is not required after the execution of a write
instruction, since the WEL bit is automatically reset.
Figure 7. Write Disable Sequence
SIO
SIO




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