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CY7C1062AV33
Document #: 38-05137 Rev. *D
Page 6 of 9
Notes:
13. CE indicates a combination of all three chip enables. When ACTIVE LOW, CE indicates the CE1, CE2 and CE3 are LOW.
14. Data I/O is high-impedance if OE or BA, BB, BC, BD = VIH.
15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Switching Waveforms (continued)
Write Cycle No. 1 (CE Controlled)
tHD
tSD
tSCE
tSA
tHA
tAW
tPWE
tWC
BW
DATAI/O
ADDRESS
CE
WE
[13, 14, 15]
t
BA, BB, BC, BD
Write Cycle No. 2 (BLE or BHE Controlled)
tHD
tSD
tBW
tSA
tHA
tAW
tPWE
tWC
tSCE
DATAI/O
ADDRESS
WE
CE
BA, BB, BC, BD
[13, 14, 15]